component
DAC539G2RTERQ1
Public Made by Adomby adom
Texas Instruments ADCs/DACs - Special Purpose, WQFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDAC539G2RTERQ1
Texas Instruments · ADCs/DACs - Special Purpose · WQFN-16(3x3)
DAC539G2RTERQ1 from Texas Instruments, in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB0 | input | Comparator input for channel 0, compared against the programmable sawtooth or triangle waveform to generate the PWM output. |
| 2 | OUT0 | output | PWM output from the channel 0 comparator. |
| 3 | NC | unconnected | Leave this pin unconnected. |
| 4 | NC | unconnected | Leave this pin unconnected. |
| 5 | SDO | output | In configuration mode (MODE low) this is the SPI serial data output and needs an external pullup to the I/O voltage; in standalone mode (MODE high) it is not connected. |
| 6 | SCL/SYNC/GPI2 | input | In configuration mode this is the I2C serial clock or SPI chip-select input, which must be pulled up to the I/O voltage with an external resistor for SPI chip select; in standalone mode (MODE high) it is general-purpose input 2. |
| 7 | A0/SDI/GPI1 | input | In configuration mode this is the I2C address input (connect to VDD, AGND, SDA or SCL) or the SPI serial data input (no pullup or pulldown required); in standalone mode (MODE high) it is general-purpose input 1. |
| 8 | SDA/SCLK/GPI0 | bidirectional | In configuration mode this is the bidirectional I2C serial data bus (external pullup to the I/O voltage required) or the SPI clock input; in standalone mode (MODE high) it is general-purpose input 0. |
| 9 | NC | unconnected | Leave this pin unconnected. |
| 10 | NC | unconnected | Leave this pin unconnected. |
| 11 | OUT1 | output | Voltage output of the 10-bit DAC channel 1. |
| 12 | FB1 | input | Voltage feedback input for the DAC channel 1 output amplifier; connect to OUT1 for closed-loop voltage output. |
| 13 | CAP | power_out | External bypass capacitor connection for the internal LDO; connect approximately 1.5 µF between CAP and AGND (allowed range 0.5 µF to 15 µF per recommended operating conditions). |
| 14 | AGND | power_in | Ground reference point for all circuitry on the device. |
| 15 | VDD | power_in | Single supply voltage input, 1.8 V to 5.5 V (decouple with 0.1 µF). |
| 16 | MODE | input | Selects configuration versus standalone interface mode and serves as external reference input; connect ~0.1 µF to AGND, use a pullup to VDD when no external reference is used, and do not ramp it before VDD. |
| 17 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16(3x3) |
| Category | Data Acquisition |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
DAC539G2RTERQ1 - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)
- 3D model files:
dac539g2rterq1-etched.step/dac539g2rterq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac539g2rterq1.step/dac539g2rterq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (63 pp, sha256
88d1cbf0a663ce18, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).