component
STM8S103F3P6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8S103F3P6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM8S103F3P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD4/BEEP/TIM2_CH1/UART1_CK | bidirectional | GPIO Port D4, configurable as BEEP output, TIM2 channel 1, or UART1 clock; high-sink capable. |
| 2 | PD5/AIN5/UART1_TX | bidirectional | GPIO Port D5, configurable as UART1 transmit or analog input 5; high-sink capable. |
| 3 | PD6/AIN6/UART1_RX | bidirectional | GPIO Port D6, configurable as UART1 receive or analog input 6; high-sink capable. |
| 4 | NRST | bidirectional | Active-low reset input with internal 30-80 kΩ pull-up resistor and open-drain output for device reset control. |
| 5 | PA1/OSCIN | bidirectional | Oscillator crystal/resonator input supporting 1-16 MHz external clock source. |
| 6 | PA2/OSCOUT | bidirectional | Oscillator crystal/resonator output supporting 1-16 MHz external clock source. |
| 7 | VSS | power_in | Digital ground; 0V reference for all circuits. |
| 8 | VCAP | power_in | Internal regulator capacitor connection; attach 470-3300 nF capacitor with ESR <0.3 Ω to VSS for 1.8 V core supply. |
| 9 | VDD | power_in | Digital power supply; provide +2.95 V to +5.5 V on all VDD pins. |
| 10 | PA3/TIM2_CH3 | bidirectional | GPIO Port A3, configurable as TIM2 channel 3 or SPI slave select (NSS) when AFR1 remapping enabled; high-sink capable. |
| 11 | PB5/I2C_SDA | bidirectional | GPIO Port B5, true open-drain I2C data line (SDA) or TIM1 break input when remapped; I2C up to 400 kbit/s. |
| 12 | PB4/I2C_SCL | bidirectional | GPIO Port B4, true open-drain I2C clock line (SCL) or ADC external trigger when remapped; I2C up to 400 kbit/s. |
| 13 | PC3/TIM1_CH3 | bidirectional | GPIO Port C3, configurable as TIM1 channel 3, top-level interrupt (TLI), or TIM1 inverted channel 1; high-sink capable. |
| 14 | PC4/CLK_CCO/TIM1_CH4/AIN2 | bidirectional | GPIO Port C4, configurable as clock output, TIM1 channel 4, analog input 2, or TIM1 inverted channel 2; high-sink capable. |
| 15 | PC5/SPI_SCK | bidirectional | GPIO Port C5, configurable as SPI clock or TIM2 channel 1 when remapped; high-sink capable; SPI to 8 MHz. |
| 16 | PC6/SPI_MOSI | bidirectional | GPIO Port C6, configurable as SPI master out/slave in or TIM1 channel 1 when remapped; high-sink capable; SPI to 8 MHz. |
| 17 | PC7/SPI_MISO | bidirectional | GPIO Port C7, configurable as SPI master in/slave out or TIM1 channel 2 when remapped; high-sink capable; SPI to 8 MHz. |
| 18 | PD1/SWIM | bidirectional | GPIO Port D1, SWIM single-wire interface module data pin for in-circuit debug and Flash programming; pull-up active during reset. |
| 19 | PD2/AIN3 | bidirectional | GPIO Port D2, configurable as analog input 3 or TIM2 channel 3 when remapped; high-sink capable. |
| 20 | PD3/AIN4/TIM2_CH2/ADC_ETR | bidirectional | GPIO Port D3, configurable as analog input 4, TIM2 channel 2, or ADC external trigger; high-sink capable. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
STM8S103F3P6TR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
stm8s103f3p6tr-etched.step/stm8s103f3p6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8s103f3p6tr.step/stm8s103f3p6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (120 pp, sha256
d303ed1ea52e91ea, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).