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Contents

README

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TP2104N3-G-P003

Microchip Tech · MOSFETs · TO-92-3

TP2104N3-G-P003 from Microchip Tech, in a TO-92-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal of the P-channel enhancement-mode vertical DMOS FET, as listed in the TO-92 pin function table (Table 3-2); the datasheet gives no further limits for this pin.
2 Gate input Gate terminal that controls the P-channel enhancement-mode DMOS FET; the datasheet gives VGS(th) of -1 V to -2 V and an absolute maximum gate-to-source voltage of ±20 V.
3 Drain passive Drain terminal of the P-channel enhancement-mode vertical DMOS FET, as listed in the TO-92 pin function table (Table 3-2); the datasheet gives no further limits for this pin.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TO-92-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate-to-Source Voltage -20 20 V 2
Operating Ambient Temperature TA -55 150 °C 2
Storage Temperature TS -55 150 °C 2
Drain-to-Source Breakdown Voltage BVDSS -40 V VGS = 0V, ID = -1 mA 2
Gate Threshold Voltage VGS(th) -1 -2 V VGS = VDS, ID = -1 mA 2
Change in VGS(th) with Temperature ΔVGS(th) 5.8 6.5 mV/°C VGS = VDS, ID = -1 mA (Note 1) 2
Gate Body Leakage Current IGSS -1 -100 nA VGS = ± 20V, VDS = 0V 2
Zero-Gate Voltage Drain Current IDSS -10 μA VGS = 0V, VDS = Maximum rating 2
Zero-Gate Voltage Drain Current IDSS -1 mA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) 2
On-State Drain Current ID(ON) -0.6 A VGS = -10V, VDS = -25V 2
Static Drain-to-Source On-State Resistance RDS(ON) 10 Ω VGS = -4.5V, ID = -50 mA 2
Static Drain-to-Source On-State Resistance RDS(ON) 6 Ω VGS = -10V, ID = -500 mA 2
Change in RDS(ON) with Temperature ΔRDS(ON) 0.55 1 %/°C VGS = -10V, ID = -500 mA (Note 1) 2
Forward Transconductance GFS 150 200 mmho VDS = -25V, ID = -500 mA 3
Input Capacitance CISS 35 60 pF VGS = 0V, VDS = -25V, f = 1 MHz 3
Common Source Output Capacitance COSS 22 30 pF 3
Reverse Transfer Capacitance CRSS 8 10 pF 3
Turn-On Delay Time td(ON) 4 6 ns VDD = -25V, ID = -500 mA, RGEN = 25Ω 3
Rise Time tr 4 8 ns 3
Turn-Off Delay Time td(OFF) 5 9 ns 3
Fall Time tf 5 8 ns 3
Diode Forward Voltage Drop VSD -1.2 -2 V VGS = 0V, ISD = -500 mA (Note 1) 3
Total Continuous Drain Current, 3-lead TO-92 ID -175 mA Continuous (Note 1: limited by maximum rated TJ) 3
Total Pulsed Drain Current, 3-lead TO-92 ID -1000 mA Pulsed 3
Power Dissipation, 3-lead TO-92 PD 0.74 W TA = 25°C 3
Thermal Resistance, Junction to Ambient, 3-lead TO-92 JA 132 °C/W 3

CAD (KiCad official)

  • Symbol: TP2104N3-G-P003
  • Footprint: Package_TO_SOT_THT:TO-92_Inline
  • 3D model: TO-92-3 (KiCad packages3D, STEP)
  • 3D model files: tp2104n3-g-p003-etched.step / tp2104n3-g-p003-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp2104n3-g-p003.step / tp2104n3-g-p003.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (14 pp, sha256 7acad1ec34a678e0, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF