component
XRA1403IG24TR-F
Public Made by Adomby adom
MaxLinear I/O Expanders, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXRA1403IG24TR-F
MaxLinear · I/O Expanders · TSSOP-24
XRA1403IG24TR-F from MaxLinear, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IRQ# | output | Interrupt output (open-drain, active LOW). |
| 2 | SI | input | SPI serial data input. |
| 3 | RESET# | input | Active-LOW reset; a LOW pulse longer than 40 ns resets the internal registers and configures all GPIOs as inputs. |
| 4 | P0 | bidirectional | General purpose I/O P0, configured as an input upon power-up or after a reset. |
| 5 | P1 | bidirectional | General purpose I/O P1, configured as an input upon power-up or after a reset. |
| 6 | P2 | bidirectional | General purpose I/O P2, configured as an input upon power-up or after a reset. |
| 7 | P3 | bidirectional | General purpose I/O P3, configured as an input upon power-up or after a reset. |
| 8 | P4 | bidirectional | General purpose I/O P4, configured as an input upon power-up or after a reset. |
| 9 | P5 | bidirectional | General purpose I/O P5, configured as an input upon power-up or after a reset. |
| 10 | P6 | bidirectional | General purpose I/O P6, configured as an input upon power-up or after a reset. |
| 11 | P7 | bidirectional | General purpose I/O P7, configured as an input upon power-up or after a reset. |
| 12 | GND | power_in | Power supply common, ground. |
| 13 | P8 | bidirectional | General purpose I/O P8, configured as an input upon power-up or after a reset. |
| 14 | P9 | bidirectional | General purpose I/O P9, configured as an input upon power-up or after a reset. |
| 15 | P10 | bidirectional | General purpose I/O P10, configured as an input upon power-up or after a reset. |
| 16 | P11 | bidirectional | General purpose I/O P11, configured as an input upon power-up or after a reset. |
| 17 | P12 | bidirectional | General purpose I/O P12, configured as an input upon power-up or after a reset. |
| 18 | P13 | bidirectional | General purpose I/O P13, configured as an input upon power-up or after a reset. |
| 19 | P14 | bidirectional | General purpose I/O P14, configured as an input upon power-up or after a reset. |
| 20 | P15 | bidirectional | General purpose I/O P15, configured as an input upon power-up or after a reset. |
| 21 | CS# | input | SPI bus chip select. |
| 22 | SCL | input | SPI bus serial input clock. |
| 23 | SO | output | SPI serial data output. |
| 24 | VCC | power_in | 1.65V to 3.6V VCC supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MaxLinear |
| Package | TSSOP-24 |
| Category | Interface ICs |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | 3.6 | V | 10 | |||
| Supply current | 160 | mA | 10 | ||||
| Ground current | 200 | mA | 10 | ||||
| External current limit of each GPIO | 25 | mA | 10 | ||||
| Total current limit for GPIO[15:8] and GPIO[7:0] | 100 | mA | 10 | ||||
| Total current limit for GPIO[15:0] | 200 | mA | 10 | ||||
| Total supply current sourced by all GPIOs | 160 | mA | 10 | ||||
| Operating temperature | -40 | 85 | °C | 10 | |||
| Storage temperature | -65 | 150 | °C | 10 | |||
| Power dissipation | 200 | mW | 10 | ||||
| Operating voltage | VCC | 1.65 | 3.6 | V | 1 | ||
| Operating temperature range | TA | -40 | 85 | °C | XRA1403IG24TR-F | 2 | |
| Thermal resistance junction-ambient (24-TSSOP) | theta-ja | 84 | °C/W | margin of error ±15% | 10 | ||
| Thermal resistance junction-case (24-TSSOP) | theta-jc | 16 | °C/W | margin of error ±15% | 10 | ||
| Input Low Voltage | VIL | -0.3 | 0.2 | V | 1.8V ±10%; Note 1 | 11 | |
| Input Low Voltage | VIL | -0.3 | 0.5 | V | 2.5V ±10%; Note 1 | 11 | |
| Input Low Voltage | VIL | -0.3 | 0.8 | V | 3.3V ±10%; Note 1 | 11 | |
| Input High Voltage | VIH | 1.4 | 5.5 | V | 1.8V ±10%; Note 1 | 11 | |
| Input High Voltage | VIH | 1.8 | 5.5 | V | 2.5V ±10%; Note 1 | 11 | |
| Input High Voltage | VIH | 2 | 5.5 | V | 3.3V ±10%; Note 1 | 11 | |
| Output Low Voltage (SO, IRQ#) | VOL | 0.4 | V | IOL = 6 mA / 4 mA / 1.5 mA; Note 2 & Note 4 | 11 | ||
| Output Low Voltage (GPIOs) | VOL | 0.5 | V | IOL = 8 mA; Note 3 | 11 | ||
| Output High Voltage (SO) | VOH | 1.4 | V | 1.8V ±10%; IOL = -4 mA; Note 2 | 11 | ||
| Output High Voltage (SO) | VOH | 1.8 | V | 2.5V ±10%; IOL = -2 mA; Note 2 | 11 | ||
| Output High Voltage (SO) | VOH | 2 | V | 3.3V ±10%; IOL = -0.2 mA; Note 2 | 11 | ||
| Output High Voltage (GPIOs) | VOH | 1.2 | V | 1.8V ±10%; IOH = -8 mA; Note 3 | 11 | ||
| Output High Voltage (GPIOs) | VOH | 1.8 | V | 2.5V ±10%; IOH = -8 mA; Note 3 | 11 | ||
| Output High Voltage (GPIOs) | VOH | 2.6 | V | 3.3V ±10%; IOH = -8 mA; Note 3 | 11 | ||
| Input Low Leakage Current | IIL | -10 | 10 | uA | 1.8V, 2.5V, 3.3V ±10% | 11 | |
| Input High Leakage Current | IIH | -10 | 10 | uA | 1.8V, 2.5V, 3.3V ±10% | 11 | |
| Input Pin Capacitance | CIN | 5 | pF | 1.8V, 2.5V, 3.3V ±10% | 11 | ||
| Power Supply Current | ICC | 0.5 | mA | 1.8V ±10%; Test 1 | 11 | ||
| Power Supply Current | ICC | 1 | mA | 2.5V ±10%; Test 1 | 11 | ||
| Power Supply Current | ICC | 2 | mA | 3.3V ±10%; Test 1 | 11 | ||
| Power Supply Current | ICC | 0.6 | mA | 1.8V ±10%; Test 2 | 11 | ||
| Power Supply Current | ICC | 1.2 | mA | 2.5V ±10%; Test 2 | 11 | ||
| Power Supply Current | ICC | 2.4 | mA | 3.3V ±10%; Test 2 | 11 | ||
| Standby Current | ICCS | 1 | uA | 1.8V ±10%; Test 3 | 11 | ||
| Standby Current | ICCS | 2 | uA | 2.5V ±10%; Test 3 | 11 | ||
| Standby Current | ICCS | 5 | uA | 3.3V ±10%; Test 3 | 11 | ||
| GPIO pull-up resistance | RGPIO | 60 | 100 | 140 | kΩ | 100kΩ ± 40% | 11 |
| Reset# pull-up resistance | RRESET# | 35 | 60 | 85 | kΩ | 60kΩ ± 40% | 11 |
| SCL operating frequency | fSCL | 15 | MHz | 1.8V ±10% | 12 | ||
| SCL operating frequency | fSCL | 26 | MHz | 2.5V ±10% and 3.3V ±10% | 12 | ||
| CS# to SCL setup time | TCSS | 20 | ns | 1.8V, 2.5V, 3.3V ±10% | 12 | ||
| CS# to SCL hold time | TCSH | 20 | ns | 1.8V, 2.5V, 3.3V ±10% | 12 | ||
| SCL fall to SO valid time | TDO | 100 | ns | CL = 30 pF | 12 | ||
| SI to SCL setup time | TDS | 20 | ns | 1.8V, 2.5V, 3.3V ±10% | 12 | ||
| SI to SCL hold time | TDH | 20 | ns | 1.8V, 2.5V, 3.3V ±10% | 12 | ||
| SCL period | TCP | 66 | ns | 1.8V ±10%; TCH + TCL | 12 | ||
| SCL period | TCP | 38 | ns | 2.5V ±10% and 3.3V ±10%; TCH + TCL | 12 | ||
| SCL HIGH time | TCH | 30 | ns | 1.8V ±10% | 12 | ||
| SCL HIGH time | TCH | 15 | ns | 2.5V ±10% and 3.3V ±10% | 12 | ||
| SCL LOW time | TCL | 30 | ns | 1.8V ±10% | 12 | ||
| SCL LOW time | TCL | 15 | ns | 2.5V ±10% and 3.3V ±10% | 12 | ||
| CS# HIGH pulse width | TCSW | 30 | ns | 1.8V, 2.5V, 3.3V ±10% | 12 | ||
| SPI input pin interrupt clear | TD13 | 200 | ns | 1.8V, 2.5V, 3.3V ±10% | 12 |
CAD (KiCad official)
- Symbol:
XRA1403IG24TR-F - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
xra1403ig24tr-f-etched.step/xra1403ig24tr-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xra1403ig24tr-f.step/xra1403ig24tr-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MaxLinear datasheet (16 pp, sha256
d4200752f3a95af3, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).