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C8051F314-GQR

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SILICON LABS Microcontroller Units (MCUs/MPUs/SOCs), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerc8051f314-gqrfactory-2.0.0extractor-text

Verified C8051F314-GQR

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 32 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: C8051F314-GQR · LQFP-32(7x7) · 32 pins
  • ✓copper: 32 copper pads, none touching another net
  • ✓datasheet: all 32 pin names found in the 228-page datasheet
  • ✓distributor: lcsc C3220733, digikey C8051F314-GQR-ND, mouser 634-C8051F314-GQR
  • ✓family: LQFP-32_7x7mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-b0d0en37/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 32 pins = 32 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 32 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ c8051f314-gqr.kicad_sym✓ c8051f314-gqr.kicad_mod✓ c8051f314-gqr.step
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Symbol & Footprint

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Contents

README

markdown

C8051F314-GQR

SILICON LABS · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-32(7x7)

C8051F314-GQR from SILICON LABS, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P0.1 bidirectional Port 0.1. See Section 13 for a complete description.
2 P0.0 bidirectional Port 0.0. See Section 13 for a complete description.
3 GND power_in Ground.
4 VDD power_in Power Supply Voltage.
5 RST/C2CK bidirectional Device Reset: open-drain output of internal POR; an external source can initiate a system reset by driving this pin low for at least 10 µs. Also the clock signal for the C2 Debug Interface.
6 P3.0/C2D bidirectional Port 3.0. See Section 13 for a complete description. Also the bi-directional data signal for the C2 Debug Interface.
7 P3.1 bidirectional Port 3.1. See Section 13 for a complete description.
8 P3.2 bidirectional Port 3.2. See Section 13 for a complete description.
9 P3.3 bidirectional Port 3.3. See Section 13 for a complete description.
10 P3.4 bidirectional Port 3.4. See Section 13 for a complete description.
11 P2.7 bidirectional Port 2.7. See Section 13 for a complete description.
12 P2.6 bidirectional Port 2.6. See Section 13 for a complete description.
13 P2.5 bidirectional Port 2.5. See Section 13 for a complete description.
14 P2.4 bidirectional Port 2.4. See Section 13 for a complete description.
15 P2.3 bidirectional Port 2.3. See Section 13 for a complete description.
16 P2.2 bidirectional Port 2.2. See Section 13 for a complete description.
17 P2.1 bidirectional Port 2.1. See Section 13 for a complete description.
18 P2.0 bidirectional Port 2.0. See Section 13 for a complete description.
19 P1.7 bidirectional Port 1.7. See Section 13 for a complete description.
20 P1.6 bidirectional Port 1.6. See Section 13 for a complete description.
21 P1.5 bidirectional Port 1.5. See Section 13 for a complete description.
22 P1.4 bidirectional Port 1.4. See Section 13 for a complete description.
23 P1.3 bidirectional Port 1.3. See Section 13 for a complete description.
24 P1.2 bidirectional Port 1.2. See Section 13 for a complete description.
25 P1.1 bidirectional Port 1.1. See Section 13 for a complete description.
26 P1.0 bidirectional Port 1.0. See Section 13 for a complete description.
27 P0.7 bidirectional Port 0.7. See Section 13 for a complete description.
28 P0.6 bidirectional Port 0.6. See Section 13 for a complete description.
29 P0.5 bidirectional Port 0.5. See Section 13 for a complete description.
30 P0.4 bidirectional Port 0.4. See Section 13 for a complete description.
31 P0.3/XTAL2 output Port 0.3. Also the external oscillator excitation driver for a crystal or resonator, or the external clock input for CMOS, capacitor, or RC oscillator configurations.
32 P0.2/XTAL1 input Port 0.2. Also the external clock input, which is the external oscillator return for a crystal or resonator.

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package LQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature under bias -55 125 °C 35
Storage Temperature -65 150 °C 35
Voltage on any Port I/O Pin or RST with respect to GND -0.3 5.8 V 35
Voltage on VDD with respect to GND -0.3 4.2 V 35
Maximum Total current through VDD and GND 500 mA 35
Maximum output current sunk by RST or any Port pin 100 mA 35
Digital Supply Voltage VRST 3 3.6 V 36
Specified Operating Temperature Range -40 85 °C 36
SYSCLK (system clock frequency) 0 25 MHz 36
Tsysl (SYSCLK low time) Tsysl 18 ns 36
Tsysh (SYSCLK high time) Tsysh 18 ns 36
Digital Supply Current CPU Active, IDD IDD 7.8 8.6 mA VDD = 3.0 V, F = 25 MHz 36
Digital Supply Current CPU Active, IDD IDD 10.7 12.1 mA VDD = 3.6 V, F = 25 MHz 36
Digital Supply Current CPU Inactive (Idle), IDD IDD 3.8 4.3 mA VDD = 3.0 V, F = 25 MHz 37
Digital Supply Current CPU Inactive (Idle), IDD IDD 4.8 5.3 mA VDD = 3.6 V, F = 25 MHz 37
Internal Oscillator Frequency 24 24.5 25 MHz 123
Internal Oscillator Supply Current (from VDD) 450 1000 µA OSCICN.7 = 1 123
RST Output Low Voltage 0.6 V IOL = 8.5 mA, VDD = 2.7 to 3.6 V 110
RST Input High Voltage 0.7 V 110
RST Input Low Voltage 0.3 V 110
RST Input Pullup Current 25 40 µA RST = 0.0 V 110
VDD Monitor Threshold (VRST) VRST 2.4 2.55 2.7 V 110
Missing Clock Detector Timeout 100 220 600 µs Time from last system clock rising edge to reset initiation 110
Reset Time Delay 5 µs Delay between release of any reset source and code execution at location 0x0000 110
Minimum RST Low Time to Generate a System Reset 15 µs 110
VDD Monitor Turn-on Time 100 µs 110
VDD Monitor Supply Current 20 50 µA 110
VDD Ramp Time 1 ms VDD = 0 V to VDD = 2.7 V 110
Flash Size 8192 bytes C8051F312/3/4/5 112
Endurance 20 100 k Erase/Write 112
Erase Cycle Time 10 15 20 ms 25 MHz System Clock 112
Write Cycle Time 40 55 70 µs 25 MHz System Clock 112
Common-Mode Rejection Ratio 1.5 4 mV/V 78
Positive Hysteresis 1 CP0HYP1-0 0 1 mV CP0HYP1-0 = 00 78
Positive Hysteresis 2 CP0HYP1-0 2 5 7 mV CP0HYP1-0 = 01 78
Positive Hysteresis 3 CP0HYP1-0 5 10 13 mV CP0HYP1-0 = 10 78
Positive Hysteresis 4 CP0HYP1-0 12 20 25 mV CP0HYP1-0 = 11 78
Negative Hysteresis 1 CP0HYN1-0 0 1 mV CP0HYN1-0 = 00 78
Negative Hysteresis 2 CP0HYN1-0 2 5 7 mV CP0HYN1-0 = 01 78
Negative Hysteresis 3 CP0HYN1-0 5 10 13 mV CP0HYN1-0 = 10 78
Negative Hysteresis 4 CP0HYN1-0 12 20 25 mV CP0HYN1-0 = 11 78
Inverting or Non-Inverting Input Voltage Range -0.25 V 78
Input Offset Voltage -5 5 mV 78
Power Supply Rejection 0.1 1 mV/V 78
Supply Current at DC Mode 0 7.6 20 µA Mode 0 78
Supply Current at DC Mode 1 3.2 10 µA Mode 1 78
Supply Current at DC Mode 2 1.3 5 µA Mode 2 78
Supply Current at DC Mode 3 0.4 2.5 µA Mode 3 78

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small Body 43

CAD (KiCad official)

  • Symbol: C8051F314-GQR
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: c8051f314-gqr-etched.step / c8051f314-gqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); c8051f314-gqr.step / c8051f314-gqr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (228 pp, sha256 20ef9aedb3ff2818, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF