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Contents

README

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L32AOC012288PBL

Lucki · Crystal Oscillators · SMD3225-4P

L32AOC012288PBL from Lucki, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E/D input Enable/disable input: high or open enables output at pin 3, low (VIL 0 to 0.3*VDD) puts pin 3 in high impedance and stops oscillation, and a low-plus-floating state is unstable and disallowed.
2 GND power_in Ground reference; a 0.01uF bypass capacitor should be placed between VDD (pin 4) and GND (pin 2) to minimize power supply line noise.
3 Output output HCMOS clock output at 12.288MHz that is active when pin 1 is high or open and high impedance when pin 1 is low, with the datasheet advising a load of 15pF (drive one CMOS/TTL gate) and a 4.0 ns maximum rise and fall time.
4 VDD power_in Supply voltage of 3.3V ±10%, bypassed to GND (pin 2) with a 0.01uF capacitor.

Key specifications

Parameter Value
Manufacturer Lucki
Package SMD3225-4P
Category Crystals, Oscillators, Resonators
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Frequency stability -30 30 ppm All condition* (includes 25℃ tolerance, operating temperature range, input voltage change, aging, load change) 3
Operating temperature range TOPR -40 85 ℃ -40℃~85℃±20ppm 3
Storage temperature TSTG -55 125 ℃ 3
Power supply voltage tolerance VDD -10 10 % Printed as 3.3±10% V 3
Aging per year Fa -3 3 ppm First Year 3
Output symmetry Sym 45 55 % 3
Rise time Tr 4 ns 10%~90%VDD 3
Fall time Tf 4 ns 90%~10%VDD 3
Supply current IDD 10 A 3
Start-up time 10 S 3
Output voltage high VOH 90 % VDD Printed as 90% VDD 3
Output voltage low VOL 10 % VDD Printed as 10% VDD 3
Pin 1 E/D input high voltage (enable) VIH 0.7 1 *VDD Pin 1 open or VIH: 0.7*VDD ~ VDD, output active at pin 3 4
Pin 1 E/D input low voltage (disable) VIL 0 0.3 *VDD Pin 1 VIL: 0V ~ 0.3*VDD, oscillation stopped 4
Nominal frequency F0 12.288 MHz 3
Power supply voltage VDD 3.3 V Printed as 3.3±10% V; tolerance given as separate row 3
Output load (HCMOS) Hcmos Load 15 pF 3

CAD (KiCad official)

  • Symbol: L32AOC012288PBL
  • Footprint: Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm
  • 3D model: SMD3225-4P (KiCad packages3D, STEP)
  • 3D model files: l32aoc012288pbl-etched.step / l32aoc012288pbl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l32aoc012288pbl.step / l32aoc012288pbl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Lucki datasheet (10 pp, sha256 edd68d33b26a54fe, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF