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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32H750ZBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32H750ZBT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PE2	bidirectional	GPIO port E pin 2 with alternate functions including trace clock, SAI1 clock/data, SPI4 clock, and FMC address line 23.
2	PE3	bidirectional	GPIO port E pin 3 with alternate functions including trace data 0, timer brake input, SAI1/SAI4 data, and FMC address line 19.
3	PE4	bidirectional	GPIO port E pin 4 with alternate functions including trace data 1, SAI1 data, timer channel, SPI4 chip select, and FMC address line 20.
4	PE5	bidirectional	GPIO port E pin 5 with alternate functions including trace data 2, SAI1 clock/data, SPI4 MISO, and FMC address line 21.
5	PE6	bidirectional	GPIO port E pin 6 with alternate functions including trace data 3, timer brake input, SAI1 data, SPI4 MOSI, and FMC address line 22.
6	VBAT	power_in	Backup battery supply voltage input (1.2 to 3.6 V) for backup domain when main supply is off.
7	PC13	bidirectional	GPIO port C pin 13 with EVENTOUT alternate function and RTC tamper/wakeup capability.
8	PC14-OSC32_IN (OSC32_IN)	bidirectional	GPIO port C pin 14 / 32 kHz oscillator input for LSE clock source.
9	PC15-OSC32_OUT (OSC32_OUT)	bidirectional	GPIO port C pin 15 / 32 kHz oscillator output for LSE clock source.
10	PF0	bidirectional	GPIO port F pin 0 with alternate functions including I2C2 data and FMC address line 0.
11	PF1	bidirectional	GPIO port F pin 1 with alternate functions including I2C2 clock and FMC address line 1.
12	PF2	bidirectional	GPIO port F pin 2 with alternate functions including I2C2 SMBus alert and FMC address line 2.
13	PF3	bidirectional	GPIO port F pin 3 with alternate functions for FMC address line 3 and ADC3 analog input.
14	PF4	bidirectional	GPIO port F pin 4 with alternate functions for FMC address line 4 and ADC3 analog input channels.
15	PF5	bidirectional	GPIO port F pin 5 with alternate functions for FMC address line 5 and ADC3 analog input.
16	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
17	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
18	PF6	bidirectional	GPIO port F pin 6 with alternate functions including timer channel, SPI5 chip select, SAI1/SAI4 data, UART7 RX, and QUADSPI bank 1 I/O.
19	PF7	bidirectional	GPIO port F pin 7 with alternate functions including timer channel, SPI5 clock, SAI1 MCLK, UART7 TX, and QUADSPI bank 1 I/O.
20	PF8	bidirectional	GPIO port F pin 8 with alternate functions including timer channels, SPI5 MISO, SAI1 clock, UART7 flow control, and QUADSPI bank 1 I/O.
21	PF9	bidirectional	GPIO port F pin 9 with alternate functions including timer channel, SPI5 MOSI, SAI1 frame sync, UART7 CTS, and QUADSPI bank 1 I/O.
22	PF10	bidirectional	GPIO port F pin 10 with alternate functions including timer brake input, SAI1 data, QUADSPI clock, and FMC display enable output.
23	PH0-OSC_IN (PH0)	bidirectional	GPIO port H pin 0 / main oscillator input pin for HSE crystal or external clock.
24	PH1-OSC_OUT (PH1)	bidirectional	GPIO port H pin 1 / main oscillator output pin for HSE crystal oscillator.
25	NRST	input	Reset pin with embedded weak pull-up resistor; active low input for device reset.
26	PC0	bidirectional	GPIO port C pin 0 with alternate functions including DFSDM clock/data, SAI2 frame sync, OTG HS USB, FMC SDRAM write enable, and ADC123 analog input.
27	PC1	bidirectional	GPIO port C pin 1 with alternate functions including trace data 0, SAI1 data, SPI2/I2S2 MOSI, SDMMC2 clock, Ethernet MDC, and ADC123 analog input.
28	PC2_C	bidirectional	Analog-only GPIO port C pin 2 (alternative pad with analog switch) for DFSDM, SPI2/I2S2, OTG HS USB, Ethernet, FMC, and ADC3 analog input.
29	PC3_C	bidirectional	Analog-only GPIO port C pin 3 (alternative pad with analog switch) for DFSDM, SPI2/I2S2, OTG HS USB, Ethernet, FMC, and ADC12 analog input.
30	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
31	VSSA	power_in	Analog ground reference pin for ADC, DAC, comparator, and operational amplifier circuits.
32	VREF+	power_in	Positive analog reference voltage input pin (1.62 to 3.6 V) for ADC/DAC peripheral circuitry.
33	VDDA	power_in	Analog positive supply voltage (1.62 to 3.6 V) for ADC, DAC, comparator, operational amplifier, and VREFBUF.
34	PA0	bidirectional	GPIO port A pin 0 with alternate functions including timer channels, USART2 CTS, UART4 TX, SDMMC2 command, and ADC1 analog input with wakeup capability.
35	PA1	bidirectional	GPIO port A pin 1 with alternate functions including timer channels, LPUART/LPTIM output, USART2 RTS, UART4 RX, QUADSPI I/O, Ethernet clock, and ADC1 analog input.
36	PA2	bidirectional	GPIO port A pin 2 with alternate functions including timer channels, LPTIM output, USART2 TX, Ethernet MDIO, and ADC12 analog input with wakeup capability.
37	PA3	bidirectional	GPIO port A pin 3 with alternate functions including timer channels, LPTIM output, USART2 RX, LCD data, OTG HS USB, and ADC12 analog input.
38	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
39	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
40	PA4	bidirectional	GPIO port A pin 4 (3.3 V tolerant) with alternate functions including timer ETR, SPI chip selects, USART2 CK, OTG HS SOF, DCMI HSYNC, LCD VSYNC, and DAC1 analog output.
41	PA5	bidirectional	GPIO port A pin 5 (3.3 V tolerant) with alternate functions including timer channel, SPI1/SPI6 clock, OTG HS clock, LCD data, and DAC1 analog output.
42	PA6	bidirectional	GPIO port A pin 6 with alternate functions including timer brake/channels, SPI1 MISO, timer output compare, Ethernet RX, DCMI pixel clock, and ADC12 analog input.
43	PA7	bidirectional	GPIO port A pin 7 (3.3 V tolerant) with alternate functions including timer channel, SPI1 MOSI, Ethernet RX, FMC SDRAM control, OPAMP1 input, and ADC12 analog input.
44	PC4	bidirectional	GPIO port C pin 4 (3.3 V tolerant) with alternate functions including DFSDM clock, I2S1 MCK, SPDIFRX input, Ethernet RX, and FMC SDRAM control.
45	PC5	bidirectional	GPIO port C pin 5 (3.3 V tolerant) with alternate functions including SAI1 data, DFSDM data, SPDIFRX input, Ethernet RX, FMC SDRAM control, COMP output, and ADC12 analog input.
46	PB0	bidirectional	GPIO port B pin 0 with alternate functions including timer channels, DFSDM output, UART4 CTS, LCD data, OTG HS USB, Ethernet RX, OPAMP1 input, and ADC12 analog input.
47	PB1	bidirectional	GPIO port B pin 1 (3.3 V tolerant, USB option) with alternate functions including timer channel, DFSDM data, LCD data, OTG HS USB, Ethernet RX, and COMP1 input.
48	PB2	bidirectional	GPIO port B pin 2 with alternate functions including RTC output, SAI1 data, DFSDM clock, SPI3 MOSI, QUADSPI clock, and COMP1 input.
49	PF11	bidirectional	GPIO port F pin 11 with alternate functions including SPI5 MOSI, SAI2 data, FMC SDRAM address, DCMI data, and ADC1 analog input.
50	PF12	bidirectional	GPIO port F pin 12 with alternate functions for FMC address line 6 and ADC1 analog input.
51	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
52	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
53	PF13	bidirectional	GPIO port F pin 13 with alternate functions including DFSDM data, I2C4 SMBus, FMC address line 7, and ADC2 analog input.
54	PF14	bidirectional	GPIO port F pin 14 with alternate functions including DFSDM clock, I2C4 clock, FMC address line 8, and ADC2 analog input.
55	PF15	bidirectional	GPIO port F pin 15 with alternate functions including I2C4 data and FMC address line 9.
56	PG0	bidirectional	GPIO port G pin 0 with alternate function for FMC address line 10.
57	PG1	bidirectional	GPIO port G pin 1 (3.3 V tolerant) with alternate functions for FMC address line 11 and OPAMP2 input.
58	PE7	bidirectional	GPIO port E pin 7 (3.3 V tolerant) with alternate functions including timer ETR, DFSDM data, UART7 RX, QUADSPI I/O, FMC data, OPAMP2 output, and COMP2 input.
59	PE8	bidirectional	GPIO port E pin 8 (3.3 V tolerant) with alternate functions including timer channel, DFSDM clock, UART7 TX, QUADSPI I/O, FMC data, and COMP2 input.
60	PE9	bidirectional	GPIO port E pin 9 (3.3 V tolerant) with alternate functions including timer channel, DFSDM output, UART7 flow control, QUADSPI I/O, FMC data, and COMP2 input.
61	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
62	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
63	PE10	bidirectional	GPIO port E pin 10 with alternate functions including timer channel, DFSDM data, UART7 CTS, QUADSPI I/O, FMC data, LCD data, and COMP2 input.
64	PE11	bidirectional	GPIO port E pin 11 with alternate functions including timer channel, SPI4 chip select, SAI2 data, FMC data, and LCD data.
65	PE12	bidirectional	GPIO port E pin 12 with alternate functions including timer channel, DFSDM data, SPI4 clock, SAI2 clock, FMC data, COMP1 output, and LCD data.
66	PE13	bidirectional	GPIO port E pin 13 with alternate functions including timer channel, DFSDM clock, SPI4 MISO, SAI2 frame sync, FMC data, COMP2 output, and LCD display enable.
67	PE14	bidirectional	GPIO port E pin 14 with alternate functions including timer channel, SPI4 MOSI, SAI2 MCLK, FMC data, and LCD clock.
68	PE15	bidirectional	GPIO port E pin 15 with alternate functions including timer brake input, FMC data, COMP timer brake, and LCD data.
69	PB10	bidirectional	GPIO port B pin 10 with alternate functions including timer channel, I2C2 clock, SPI2/I2S2 clock, DFSDM data, USART3 TX, QUADSPI chip select, OTG HS USB, Ethernet RX, and LCD data.
70	PB11	bidirectional	GPIO port B pin 11 with alternate functions including timer channel, I2C2 data, DFSDM clock, USART3 RX, OTG HS USB, Ethernet TX, and LCD data.
71	VCAP	power_in	Regulator stabilization capacitor pin; connect 2.2 µF external capacitor with < 100 mΩ ESR for voltage regulation.
72	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
73	PB12	bidirectional	GPIO port B pin 12 (USB option) with alternate functions including timer brake, I2C2 SMBus, SPI2/I2S2 chip select, DFSDM data, USART3 CK, FDCAN2 RX, OTG HS USB, Ethernet TX, and UART5 RX.
74	PB13	bidirectional	GPIO port B pin 13 (USB option) with alternate functions including timer channel, LPTIM output, SPI2/I2S2 clock, DFSDM clock, USART3 CTS, FDCAN2 TX, OTG HS USB, Ethernet TX, and UART5 TX with VBUS monitoring.
75	PB14	bidirectional	GPIO port B pin 14 (USB option) with alternate functions including timer channels, USART1 TX, SPI2/I2S2 MISO, DFSDM data, USART3 RTS, UART4 RTS, SDMMC2 data, and OTG HS DM.
76	PB15	bidirectional	GPIO port B pin 15 (USB option) with alternate functions including RTC reference input, timer channels, USART1 RX, SPI2/I2S2 MOSI, DFSDM clock, UART4 CTS, SDMMC2 data, and OTG HS DP.
77	PD8	bidirectional	GPIO port D pin 8 with alternate functions including DFSDM clock, SAI3 clock, USART3 TX, SPDIFRX input, and FMC data.
78	PD9	bidirectional	GPIO port D pin 9 with alternate functions including DFSDM data, SAI3 data, USART3 RX, FDCAN2 mode select, and FMC data.
79	PD10	bidirectional	GPIO port D pin 10 with alternate functions including DFSDM output, SAI3 frame sync, USART3 CK, FDCAN2 mode select, FMC data, and LCD data.
80	PD11	bidirectional	GPIO port D pin 11 with alternate functions including LPTIM2 input, I2C4 SMBus, USART3 CTS, QUADSPI I/O, and SAI2 data.
81	PD12	bidirectional	GPIO port D pin 12 with alternate functions including LPTIM1 input, timer channel, LPTIM2 input, I2C4 clock, USART3 RTS, QUADSPI I/O, and SAI2 frame sync.
82	PD13	bidirectional	GPIO port D pin 13 with alternate functions including LPTIM1 output, timer channel, I2C4 data, QUADSPI I/O, and SAI2 clock.
83	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
84	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
85	PD14	bidirectional	GPIO port D pin 14 with alternate functions including timer channel, SAI3 MCLK, UART8 CTS, and FMC data.
86	PD15	bidirectional	GPIO port D pin 15 with alternate functions including timer channel, SAI3 MCLK, UART8 RTS, and FMC data.
87	PG2	bidirectional	GPIO port G pin 2 with alternate functions including timer brake input, FMC address line 12.
88	PG3	bidirectional	GPIO port G pin 3 with alternate functions including timer brake input (2nd source), FMC address line 13.
89	PG4	bidirectional	GPIO port G pin 4 with alternate functions including timer brake input (2nd source), FMC address BA0/line 14.
90	PG5	bidirectional	GPIO port G pin 5 with alternate functions including timer ETR and FMC address BA1/line 15.
91	PG6	bidirectional	GPIO port G pin 6 with alternate functions including timer brake input, high-resolution timer channel, QUADSPI chip select, FMC chip enable, DCMI data, and LCD data.
92	PG7	bidirectional	GPIO port G pin 7 with alternate functions including high-resolution timer channel, SAI1 MCLK, USART6 CK, FMC interrupt, DCMI data, and LCD clock.
93	PG8	bidirectional	GPIO port G pin 8 with alternate functions including timer ETR, SPI6 chip select, USART6 RTS, SPDIFRX input, Ethernet PPS, FMC SDRAM clock, and LCD data.
94	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
95	VDD33_USB	power_in	USB domain positive supply voltage (3.0 to 3.6 V when USB used; 0 to 3.6 V when USB not used).
96	PC6	bidirectional	GPIO port C pin 6 with alternate functions including high-resolution timer channel, timer channel, DFSDM clock, I2S2 MCK, USART6 TX, SDMMC1 data direction, FMC wait, SDMMC2 data, DCMI data, and LCD HSYNC.
97	PC7	bidirectional	GPIO port C pin 7 with alternate functions including high-resolution timer channel, timer channel, DFSDM data, I2S3 MCK, USART6 RX, SDMMC1 data direction, FMC chip enable, SDMMC2 data, SWPMI TX, DCMI data, and LCD data.
98	PC8	bidirectional	GPIO port C pin 8 with alternate functions including trace data 1, high-resolution timer channel, timer channel, USART6 CK, UART5 RTS, FMC chip enable, SWPMI RX, SDMMC1 data, and DCMI data.
99	PC9	bidirectional	GPIO port C pin 9 with alternate functions including MCO2 clock output, timer channel, I2C3 data, I2S clock input, UART5 CTS, QUADSPI I/O, LCD data, SWPMI suspend, SDMMC1 data, and DCMI data.
100	PA8	bidirectional	GPIO port A pin 8 with alternate functions including MCO1 clock output, timer channel, I2C3 clock, USART1 CK, OTG FS SOF, UART7 RX, LCD data, and EVENTOUT.
101	PA9	bidirectional	GPIO port A pin 9 (USB option) with alternate functions including timer channel, LPUART1 TX, I2C3 SMBus, SPI2/I2S2 clock, USART1 TX, FDCAN1 mode select, DCMI data, and LCD data with VBUS monitoring.
102	PA10	bidirectional	GPIO port A pin 10 (USB option) with alternate functions including timer channel, LPUART1 RX, USART1 RX, FDCAN1 mode select, OTG FS ID, Ethernet MDIO, LCD data, and DCMI data.
103	PA11	bidirectional	GPIO port A pin 11 (USB option) with alternate functions including timer channel, LPUART1 CTS, SPI2/I2S2 chip select, UART4 RX, USART1 CTS, FDCAN1 RX, and OTG FS DM.
104	PA12	bidirectional	GPIO port A pin 12 (USB option) with alternate functions including timer ETR, LPUART1 RTS, SPI2/I2S2 clock, UART4 TX, USART1 RTS, SAI2 frame sync, FDCAN1 TX, and OTG FS DP.
105	PA13 (JTMS/SWDIO)	bidirectional	GPIO port A pin 13 (JTAG/SWDIO debug interface) with debug pin functions JTMS-SWDIO and EVENTOUT.
106	VCAP	power_in	Regulator stabilization capacitor pin; connect 2.2 µF external capacitor with < 100 mΩ ESR for voltage regulation.
107	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
108	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
109	PA14 (JTCK/SWCLK)	bidirectional
110	PA15 (JTDI)	bidirectional
111	PC10	bidirectional
112	PC11	bidirectional
113	PC12	bidirectional
114	PD0	bidirectional
115	PD1	bidirectional
116	PD2	bidirectional
117	PD3	bidirectional
118	PD4	bidirectional
119	PD5	bidirectional
120	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
121	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
122	PD6	bidirectional
123	PD7	bidirectional
124	PG9	bidirectional
125	PG10	bidirectional
126	PG11	bidirectional
127	PG12	bidirectional
128	PG13	bidirectional
129	PG14	bidirectional
130	VSS	power_in	Ground reference pin for digital logic and I/O circuits.
131	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.
132	PG15	bidirectional
133	PB3 (JTDO/TRACESWO)	bidirectional
134	PB4 (NJTRST)	bidirectional
135	PB5	bidirectional
136	PB6	bidirectional
137	PB7	bidirectional
138	BOOT0	input
139	PB8	bidirectional
140	PB9	bidirectional
141	PE0	bidirectional
142	PE1	bidirectional
143	PDR_ON	power_in
144	VDD	power_in	Main positive supply voltage pin (1.62 to 3.6 V) for digital logic circuits.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-144(20x20)
Category	Embedded Processors & Controllers
Pins	144

CAD (KiCad official)

Symbol: STM32H750ZBT6
Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
3D model files: stm32h750zbt6-etched.step / stm32h750zbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h750zbt6.step / stm32h750zbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (335 pp, sha256 f998b441b459b05a, retrieved 2026-09-29, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF