component
LT8609EMSE#TRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, MSOP-10-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLT8609EMSE#TRPBF
Analog Devices · DC-DC Converters · MSOP-10-EP
LT8609EMSE#TRPBF from Analog Devices, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | power_out | Provides a drive voltage higher than the input voltage to the topside power switch, and a 0.1µF boost capacitor must be placed as close as possible to the IC with no series resistor. |
| 2 | SW | output | Output of the internal power switches that connects to the inductor and boost capacitor, and this node should be kept small on the PCB for good performance. |
| 3 | INTVCC | power_out | Internal 3.5V regulator bypass pin that powers the internal drivers and control circuits, with a maximum output current of 20mA, a voltage that varies between 2.8V and 3.5V, decoupling with at least 1µF low ESR ceramic, and no external loading. |
| 4 | RT | passive | A resistor is tied between RT and ground to set the switching frequency. |
| 5 | SYNC | input | External clock synchronization input: ground for low-ripple Burst Mode at low loads, tie to a clock to synchronize, leave floating for pulse-skipping mode without spread spectrum, and tie to INTVCC or to a voltage between 3.2V and 5.0V for pulse-skipping with spread spectrum. |
| 6 | FB | input | Feedback pin that the regulator holds at 0.782V, where the feedback resistor divider tap connects. |
| 7 | TR/SS | input | Output tracking and soft-start pin: a voltage below 0.782V makes FB follow TR/SS, an internal 2µA pull-up from INTVCC sets the ramp with a capacitor, and the pin is pulled to ground through 300Ω during shutdown and faults (use a series resistor when driven from a low-impedance source). |
| 8 | PG | output | Open-drain power-good output that stays low until FB is within ±8.5% of the regulation voltage with no fault conditions, and is valid when VIN is above 3.2V regardless of the EN/UV state. |
| 9 | VIN | power_in | Supplies the internal circuitry and the internal topside power switch and must be locally bypassed, with the input capacitor placed as close as possible to the VIN and GND pins. |
| 10 | EN/UV | input | Shuts the part down when low and enables it when high, with a hysteretic threshold of 1.05V rising and 1.00V falling, and it should be tied to VIN if the shutdown feature is not used. |
| 11 | GND | power_in | Exposed pad that must be connected to the negative terminal of the input capacitor and soldered to the PCB to lower the thermal resistance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10-EP |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN, EN/UV, PG voltage | 42 | V | Absolute maximum rating | 2 | |||
| FB, TR/SS voltage | 4 | V | Absolute maximum rating | 2 | |||
| SYNC Voltage | 6 | V | Absolute maximum rating | 2 | |||
| Operating Junction Temperature Range | -40 | 125 | °C | LT8609E/LT8609AE/LT8609BE (MSE package) | 2 | ||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Minimum Input Voltage | 2.7 | 3 | 3.2 | V | Over full operating temperature range (l) | 3 | |
| VIN Quiescent Current | 1 | 4 | µA | VEN/UV = 0V, VSYNC = 0V (LT8609/LT8609A) | 3 | ||
| VIN Quiescent Current | 1.7 | 12 | µA | VEN/UV = 2V, Not Switching, VSYNC = 0V (LT8609/LT8609A); over full temperature range (l) | 3 | ||
| VIN Current in Regulation | 46 | 90 | µA | VIN = 6V, VOUT = 2.7V, Output Load = 100µA (LT8609/LT8609A); over full temperature range (l) | 3 | ||
| VIN Current in Regulation | 480 | 700 | µA | VIN = 6V, VOUT = 2.7V, Output Load = 1mA (LT8609/LT8609A); over full temperature range (l) | 3 | ||
| Feedback Reference Voltage | 0.778 | 0.782 | 0.786 | V | VIN = 6V, ILOAD = 100mA (LT8609/LT8609A) | 3 | |
| Feedback Reference Voltage | 0.77 | 0.782 | 0.794 | V | VIN = 6V, ILOAD = 100mA (LT8609/LT8609A); over full temperature range (l) | 3 | |
| Feedback Voltage Line Regulation | 0.02 | 0.04 | %/V | VIN = 4.0V to 40V; over full temperature range (l) | 3 | ||
| Feedback Pin Input Current | -20 | 20 | nA | VFB = 1V; over full temperature range (l) | 3 | ||
| Minimum On-Time | 45 | 75 | ns | ILOAD = 1.5A, SYNC = 0V; over full temperature range (l) | 3 | ||
| Minimum On-Time | 45 | 60 | ns | ILOAD = 1.5A, SYNC = 1.9V; over full temperature range (l) | 3 | ||
| Minimum Off Time | 90 | 130 | ns | No conditions printed; column assignment of the two printed values inferred (see review) | 3 | ||
| Oscillator Frequency | 155 | 200 | 245 | kHz | RT = 221k, ILOAD = 0.5A (LT8609/LT8609A); over full temperature range (l) | 3 | |
| Oscillator Frequency | 640 | 700 | 760 | kHz | RT = 60.4k, ILOAD = 0.5A (LT8609/LT8609A); over full temperature range (l) | 3 | |
| Oscillator Frequency | 1.925 | 2 | 2.075 | MHz | RT = 18.2k, ILOAD = 0.5A (LT8609/LT8609A); over full temperature range (l) | 3 | |
| Top Power NMOS Current Limit | 3.4 | 4.5 | 5.7 | A | Over full temperature range (l) | 3 | |
| EN/UV Pin Threshold | 0.99 | 1.05 | 1.11 | V | EN/UV Rising; over full temperature range (l) | 3 | |
| EN/UV Pin Current | -20 | 20 | nA | VEN/UV = 2V (LT8609/LT8609A); over full temperature range (l) | 3 | ||
| PG Upper Threshold Offset from VFB | 5 | 8.5 | 13 | % | LT8609/LT8609A: VFB Rising; over full temperature range (l) | 3 | |
| PG Lower Threshold Offset from VFB | 5 | 8.5 | 13 | % | LT8609/LT8609A: VFB Falling; over full temperature range (l) | 4 | |
| PG Leakage | -200 | 200 | nA | VPG = 42V; over full temperature range (l) | 4 | ||
| PG Pull-Down Resistance | 550 | 1200 | Ω | VPG = 0.1V; column assignment of the two printed values inferred (see review) | 4 | ||
| TR/SS Source Current | 1 | 2 | 3 | µA | Over full temperature range (l) | 4 | |
| TR/SS Pull-Down Resistance | 300 | 900 | Ω | Fault Condition, TR/SS = 0.1V; column assignment of the two printed values inferred (see review) | 4 | ||
| Spread Spectrum Modulation Frequency | 1 | 3 | 6 | kHz | VSYNC = 3.3V (LT8609/LT8609A) | 4 | |
| Thermal resistance junction to ambient (eJA) | 40 | °C/W | MSE 10-lead plastic MSOP package; single printed value, entered as typ (see review) | 2 |
CAD (KiCad official)
- Symbol:
LT8609EMSE#TRPBF - Footprint:
Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm - 3D model: MSOP-10-EP (KiCad packages3D, STEP)
- 3D model files:
lt8609emse-trpbf-etched.step/lt8609emse-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt8609emse-trpbf.step/lt8609emse-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (26 pp, sha256
587a9fb33e1fb23a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).