Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32F103RDT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F103RDT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply for RTC, external clock 32 kHz oscillator and backup registers; 1.8 to 3.6 V.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O or tamper/RTC alarm output; 3.3V I/O with limited current capability (3 mA max).
3 PC14-OSC32_IN input 32.768 kHz crystal oscillator input or general-purpose I/O.
4 PC15-OSC32_OUT output 32.768 kHz crystal oscillator output or general-purpose I/O.
5 PD0 bidirectional General-purpose I/O; 5V tolerant; default OSC_IN or remapped as FSMC_D2/CAN_RX.
6 PD1 bidirectional General-purpose I/O; 5V tolerant; default OSC_OUT or remapped as FSMC_D3/CAN_TX.
7 NRST bidirectional Active low external reset input with internal pull-up and filter; typical reset threshold 0.8V max.
8 PC0 bidirectional General-purpose I/O or ADC123_IN10 analog input channel.
9 PC1 bidirectional General-purpose I/O or ADC123_IN11 analog input channel.
10 PC2 bidirectional General-purpose I/O or ADC123_IN12 analog input channel.
11 PC3 bidirectional General-purpose I/O or ADC123_IN13 analog input channel.
12 VSSA power_in Analog ground for ADC, DAC, reset blocks and internal oscillators; must be connected to VSS.
13 VDDA power_in Analog power supply for ADC, DAC and internal oscillators; 2.4 to 3.6 V when ADC/DAC used.
14 PA0-WKUP bidirectional General-purpose I/O or wakeup signal with pull-down; ADC123_IN0; TIM2_CH1_ETR/TIM5_CH1.
15 PA1 bidirectional General-purpose I/O; ADC123_IN1; USART2_RTS or TIM5_CH2/TIM2_CH2.
16 PA2 bidirectional General-purpose I/O; ADC123_IN2; USART2_TX or TIM5_CH3/TIM2_CH3.
17 PA3 bidirectional General-purpose I/O; ADC123_IN3; USART2_RX or TIM5_CH4/TIM2_CH4.
18 VSS_4 power_in Ground connection.
19 VDD_4 power_in Main power supply; 2.0 to 3.6 V.
20 PA4 bidirectional General-purpose I/O; DAC_OUT1; ADC12_IN4; SPI1_NSS or USART2_CK.
21 PA5 bidirectional General-purpose I/O; DAC_OUT2; ADC12_IN5; SPI1_SCK.
22 PA6 bidirectional General-purpose I/O; ADC12_IN6; SPI1_MISO or TIM3_CH1/TIM8_BKIN/TIM1_BKIN.
23 PA7 bidirectional General-purpose I/O; ADC12_IN7; SPI1_MOSI or TIM3_CH2/TIM8_CH1N/TIM1_CH1N.
24 PC4 bidirectional General-purpose I/O; ADC12_IN14.
25 PC5 bidirectional General-purpose I/O; ADC12_IN15.
26 PB0 bidirectional General-purpose I/O; ADC12_IN8; TIM3_CH3 or TIM8_CH2N/TIM1_CH2N.
27 PB1 bidirectional General-purpose I/O; ADC12_IN9; TIM3_CH4 or TIM8_CH3N/TIM1_CH3N.
28 PB2 bidirectional General-purpose I/O or BOOT1 mode selection; 5V tolerant.
29 VSS_1 power_in Ground connection.
30 VDD_1 power_in Main power supply; 2.0 to 3.6 V.
31 PB10 bidirectional General-purpose I/O; 5V tolerant; I2C2_SCL or USART3_TX/TIM2_CH3; UART4_TX or SDIO_D2.
32 PB11 bidirectional General-purpose I/O; 5V tolerant; I2C2_SDA or USART3_RX/TIM2_CH4; UART4_RX or SDIO_D3.
33 VSS_2 power_in Ground connection.
34 VDD_2 power_in Main power supply; 2.0 to 3.6 V.
35 PA13 bidirectional JTAG/SWDIO debug interface pin; 5V tolerant; general-purpose I/O after reconfiguration.
36 PA12 bidirectional General-purpose I/O; 5V tolerant; USART1_RTS/USBDP/CAN_TX/TIM1_ETR.
37 PA11 bidirectional General-purpose I/O; 5V tolerant; USART1_CTS/USBDM/CAN_RX/TIM1_CH4.
38 PA10 bidirectional General-purpose I/O; 5V tolerant; USART1_RX or TIM1_CH3.
39 PA9 bidirectional General-purpose I/O; 5V tolerant; USART1_TX or TIM1_CH2.
40 PA8 bidirectional General-purpose I/O; 5V tolerant; USART1_CK/TIM1_CH1/MCO.
41 PC9 bidirectional General-purpose I/O; 5V tolerant; TIM8_CH4/SDIO_D1 or TIM3_CH4.
42 PC8 bidirectional General-purpose I/O; 5V tolerant; TIM8_CH3/SDIO_D0 or TIM3_CH3.
43 PC7 bidirectional General-purpose I/O; 5V tolerant; I2S3_MCK/TIM8_CH2/SDIO_D7 or TIM3_CH2.
44 PC6 bidirectional General-purpose I/O; 5V tolerant; I2S2_MCK/TIM8_CH1/SDIO_D6 or TIM3_CH1.
45 PB15 bidirectional General-purpose I/O; 5V tolerant; SPI2_MOSI/I2S2_SD or TIM1_CH3N.
46 PB14 bidirectional General-purpose I/O; 5V tolerant; SPI2_MISO or TIM1_CH2N/USART3_RTS.
47 PB13 bidirectional General-purpose I/O; 5V tolerant; SPI2_SCK/I2S2_CK or USART3_CTS/TIM1_CH1N.
48 PB12 bidirectional General-purpose I/O; 5V tolerant; SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK or TIM1_BKIN.
49 PD2 bidirectional General-purpose I/O; 5V tolerant; TIM3_ETR/UART5_RX/SDIO_CMD.
50 PC12 bidirectional General-purpose I/O; 5V tolerant; UART5_TX/SDIO_CK or USART3_CK.
51 PC11 bidirectional General-purpose I/O; 5V tolerant; UART4_RX/SDIO_D3 or USART3_RX.
52 PC10 bidirectional General-purpose I/O; 5V tolerant; UART4_TX/SDIO_D2 or USART3_TX.
53 PA15 bidirectional JTAG/SPI NSS debug interface pin; 5V tolerant; SPI3_NSS/I2S3_WS or TIM2_CH1_ETR/SPI1_NSS.
54 PA14 bidirectional JTAG/SWCLK debug interface pin; 5V tolerant; general-purpose I/O after reconfiguration.
55 VSS_3 power_in Ground connection.
56 VDD_3 power_in Main power supply; 2.0 to 3.6 V.
57 PB9 bidirectional General-purpose I/O; 5V tolerant; TIM4_CH4/SDIO_D5 or I2C1_SDA/CAN_TX.
58 PB8 bidirectional General-purpose I/O; 5V tolerant; TIM4_CH3/SDIO_D4 or I2C1_SCL/CAN_RX.
59 BOOT0 input Boot mode selection pin for application boot from Flash (low) or system memory (high); sampled at reset.
60 PB7 bidirectional General-purpose I/O; 5V tolerant; I2C1_SDA/FSMC_NADV/TIM4_CH2 or USART1_RX.
61 PB6 bidirectional General-purpose I/O; 5V tolerant; I2C1_SCL or TIM4_CH1/USART1_TX.
62 PB5 bidirectional General-purpose I/O; I2C1_SMBA/SPI3_MOSI/I2S3_SD or TIM3_CH2/SPI1_MOSI.
63 PB4 bidirectional General-purpose I/O; 5V tolerant; NJTRST debug pin or SPI3_MISO/PB4/TIM3_CH1/SPI1_MISO.
64 PB3 bidirectional General-purpose I/O; 5V tolerant; JTAG/TRACESWO debug pin or SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F103RDT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f103rdt6-etched.step / stm32f103rdt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103rdt6.step / stm32f103rdt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (130 pp, sha256 6cc345d224870bff, retrieved 2026-09-24, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF