component
EUP3270WIR1
Public Made by Adomby adom
Eutech Microelectronics DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownEUP3270WIR1
Eutech Microelectronics · DC-DC Converters · SOIC-8-EP
EUP3270WIR1 from Eutech Microelectronics, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; the recommended supply range is 4.5V to 30V, with an absolute maximum of 32V. |
| 2 | GND | power_in | Ground. |
| 3 | COMP | passive | Loop compensation pin; driving COMP below the 0.14V enable threshold (40mV hysteresis) turns off the converter. |
| 4 | FB | input | Output feedback input, sensed through the external resistive divider that sets the output voltage. |
| 5 | CS | input | Current sense input; the CC current is set by the resistor R3 connected between CS and GND. |
| 6 | VDC | power_out | Internal VDC regulator output; bypass to ground with a ceramic capacitor. |
| 7 | FREQ | input | Frequency select pin; the switching frequency is set by resistor R4 connected between FREQ and GND (150kHz at R4=0Ω). |
| 8 | PGND | power_in | Power ground; keep separate from analog ground and join at a single point. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Eutech Microelectronics |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | 4.5 | 30 | V | 5 | |||
| Supply Voltage (VIN) | VIN | 4.5 | 30 | V | 5 | ||
| Operating Temperature Range | -40 | 85 | °C | 5 | |||
| Input Voltage (VIN) | VIN | -0.3 | 32 | V | 5 | ||
| Switch Voltage (VSW) | VSW | -1 | V | Upper limit printed as VIN +0.3V | 5 | ||
| CS | -0.3 | 13 | V | 5 | |||
| All Other Pins | -0.3 | 6 | V | 5 | |||
| Junction Temperature | TJ | 150 | °C | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Lead Temp (Soldering) | 260 | °C | 10 sec soldering | 5 | |||
| Thermal Resistance θJA (SOP-8_EP) | θJA | 60 | °C/W | SOP-8_EP | 5 | ||
| Input No Load Current | 10 | mA | IOUT=0A | 5 | |||
| Quiescent Current | 1 | mA | VFB=0.8V | 5 | |||
| Shutdown Current | 380 | µA | VCOMP=0V | 5 | |||
| Input Under Voltage Lockout Threshold | 3.95 | 4.15 | 4.35 | V | Rising | 5 | |
| Input Under Voltage Lockout Threshold Hysteresis | 0.4 | V | 5 | ||||
| Current Limit | 7.5 | A | 5 | ||||
| Operating frequency | 135 | 150 | 165 | kHz | R4=0Ω | 5 | |
| Operating frequency | 127 | 173 | kHz | TJ = -25°C to 125°C | 5 | ||
| Maximum Duty Cycle | 100 | % | 5 | ||||
| Minimum On-Time | 150 | ns | 5 | ||||
| CS Reference Voltage | 57.4 | 60 | 62.6 | mV | 5 | ||
| CS Reference Voltage | 56.4 | 63.6 | mV | TJ = -25°C to 125°C | 5 | ||
| Reference Voltage of the Voltage Error Amplifier | 0.591 | 0.6 | 0.609 | V | 5 | ||
| Transconductance of Error Amplifier | 75 | µA/V | 5 | ||||
| Reference Voltage of the Short Circuit Foldback Comparator | 0.24 | V | 5 | ||||
| COMP Enable Threshold | 0.14 | V | Rising | 5 | |||
| COMP Enable Threshold Hysteresis | 40 | mV | 5 | ||||
| Thermal Shut-down Temperature | 150 | °C | Temperature Rising | 5 | |||
| Thermal Shut-down Temperature | 100 | °C | Temperature Falling | 5 | |||
| PMOS Drain-Source On-State Resistance | 35 | mΩ | VIN=12V, IOUT=1A | 5 | |||
| PMOS Drain-Source On-State Resistance | 44 | mΩ | VIN=5V, IOUT=1A | 5 | |||
| NMOS Drain-Source On-State Resistance | 32 | mΩ | IOUT=1A | 5 |
CAD (KiCad official)
- Symbol:
EUP3270WIR1 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
eup3270wir1-etched.step/eup3270wir1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);eup3270wir1.step/eup3270wir1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Eutech Microelectronics datasheet (9 pp, sha256
bbc3f9c561b7987e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).