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TC4052BFT
Public Made by Adomby adom
TOSHIBA Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTC4052BFT
TOSHIBA · Signal Switches, Multiplexers, Decoders · TSSOP-16
TC4052BFT from TOSHIBA, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 0Y | bidirectional | Y-bank analog switch channel 0 I/O, selected when A=B=L and INH=L, with signal range VEE to VDD. |
| 2 | 2Y | bidirectional | Y-bank analog switch channel 2 I/O, selected when A=L, B=H and INH=L, with signal range VEE to VDD. |
| 3 | Y-COM | bidirectional | Y-bank common I/O connected to the selected Y channel, with signal range VEE to VDD. |
| 4 | 3Y | bidirectional | Y-bank analog switch channel 3 I/O, selected when A=B=H and INH=L, with signal range VEE to VDD. |
| 5 | 1Y | bidirectional | Y-bank analog switch channel 1 I/O, selected when A=H, B=L and INH=L, with signal range VEE to VDD. |
| 6 | INH | input | Inhibit control input; H turns all channels off, L enables the selected channel, with input range VSS to VDD and must not be left floating. |
| 7 | VEE | power_in | Negative analog supply; VDD-VEE must be 3 to 18 V (absolute max 20 V), and sets the lower limit of the switch signal range. |
| 8 | VSS | power_in | Ground/logic low reference for control inputs; VDD-VSS must be 3 to 18 V (absolute max 20 V). |
| 9 | B | input | Channel select input B (MSB for the 4 channels), with input range VSS to VDD; tie to VDD or VSS if unused. |
| 10 | A | input | Channel select input A (LSB), with input range VSS to VDD; tie to VDD or VSS if unused. |
| 11 | 3X | bidirectional | X-bank analog switch channel 3 I/O, selected when A=B=H and INH=L, with signal range VEE to VDD. |
| 12 | 0X | bidirectional | X-bank analog switch channel 0 I/O, selected when A=B=L and INH=L, with signal range VEE to VDD. |
| 13 | X-COM | bidirectional | X-bank common I/O connected to the selected X channel, with signal range VEE to VDD. |
| 14 | 1X | bidirectional | X-bank analog switch channel 1 I/O, selected when A=H, B=L and INH=L, with signal range VEE to VDD. |
| 15 | 2X | bidirectional | X-bank analog switch channel 2 I/O, selected when A=L, B=H and INH=L, with signal range VEE to VDD. |
| 16 | VDD | power_in | Positive supply; VDD-VSS and VDD-VEE must be 3 to 18 V (absolute max 20 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VDD-VSS | -0.5 | 20 | V | 4 | ||
| Control input current | ICIN | -10 | 10 | mA | 4 | ||
| Potential difference across I/O during ON | VI-VO | -0.5 | 0.5 | V | 4 | ||
| Power dissipation | PD | 180 | mW | SOP/TSSOP package | 4 | ||
| Operating temperature range | Topr | -40 | 85 | °C | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| DC supply voltage | VDD-VSS | 3 | 18 | V | 5 | ||
| Control input high voltage | VIH | 3.5 | V | Ta=-40°C; VDD=5V; VEE=VSS; IIS<2μA all OFF channels | 5 | ||
| Control input high voltage | VIH | 7 | V | Ta=-40°C; VDD=10V; VEE=VSS; IIS<2μA all OFF channels | 5 | ||
| Control input high voltage | VIH | 11 | V | Ta=-40°C; VDD=15V; VEE=VSS; IIS<2μA all OFF channels | 5 | ||
| Control input high voltage | VIH | 3.5 | 2.75 | V | Ta=25°C; VDD=5V; VEE=VSS; IIS<2μA all OFF channels | 5 | |
| Control input high voltage | VIH | 7 | 5.5 | V | Ta=25°C; VDD=10V; VEE=VSS; IIS<2μA all OFF channels | 5 | |
| Control input high voltage | VIH | 11 | 8.25 | V | Ta=25°C; VDD=15V; VEE=VSS; IIS<2μA all OFF channels | 5 | |
| Control input low voltage | VIL | 1.5 | V | Ta=-40°C; VDD=5V; VEE=VSS; IIS<2μA all OFF channels | 5 | ||
| Control input low voltage | VIL | 3 | V | Ta=-40°C; VDD=10V; VEE=VSS; IIS<2μA all OFF channels | 5 | ||
| Control input low voltage | VIL | 4 | V | Ta=-40°C; VDD=15V; VEE=VSS; IIS<2μA all OFF channels | 5 | ||
| Control input low voltage | VIL | 2.25 | 1.5 | V | Ta=25°C; VDD=5V; VEE=VSS; IIS<2μA all OFF channels | 5 | |
| Control input low voltage | VIL | 4.5 | 3 | V | Ta=25°C; VDD=10V; VEE=VSS; IIS<2μA all OFF channels | 5 | |
| Control input low voltage | VIL | 6.75 | 4 | V | Ta=25°C; VDD=15V; VEE=VSS; IIS<2μA all OFF channels | 5 | |
| On-state resistance | RON | 850 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=5V; Ta=-40°C | 5 | ||
| On-state resistance | RON | 210 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=10V; Ta=-40°C | 5 | ||
| On-state resistance | RON | 140 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=15V; Ta=-40°C | 5 | ||
| On-state resistance | RON | 240 | 950 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=5V; Ta=25°C | 5 | |
| On-state resistance | RON | 110 | 250 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=10V; Ta=25°C | 5 | |
| On-state resistance | RON | 80 | 160 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=15V; Ta=25°C | 5 | |
| On-state resistance | RON | 1200 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=5V; Ta=85°C | 5 | ||
| On-state resistance | RON | 300 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=10V; Ta=85°C | 5 | ||
| On-state resistance | RON | 200 | Ω | 0≤VIS≤VDD; RL=10kΩ; VSS=VEE=0V; VDD=15V; Ta=85°C | 5 | ||
| Input/output leakage current | IOFF | -100 | 100 | nA | VDD=18V; VIN=18V,VOUT=0V or VIN=0V,VOUT=18V; Ta=-40°C | 5 | |
| Input/output leakage current | IOFF | -1000 | 1000 | nA | VDD=18V; VIN=18V,VOUT=0V or VIN=0V,VOUT=18V; Ta=85°C | 5 | |
| Quiescent supply current | IDD | 5 | μA | VIN=VSS,VDD; VDD=5V; Ta=-40°C | 5 | ||
| Quiescent supply current | IDD | 10 | μA | VIN=VSS,VDD; VDD=10V; Ta=-40°C | 5 | ||
| Quiescent supply current | IDD | 20 | μA | VIN=VSS,VDD; VDD=15V; Ta=-40°C | 5 | ||
| Quiescent supply current | IDD | 0.005 | 5 | μA | VIN=VSS,VDD; VDD=5V; Ta=25°C | 5 | |
| Quiescent supply current | IDD | 0.01 | 10 | μA | VIN=VSS,VDD; VDD=10V; Ta=25°C | 5 | |
| Quiescent supply current | IDD | 0.015 | 20 | μA | VIN=VSS,VDD; VDD=15V; Ta=25°C | 5 | |
| Quiescent supply current | IDD | 150 | μA | VIN=VSS,VDD; VDD=5V; Ta=85°C | 5 | ||
| Quiescent supply current | IDD | 300 | μA | VIN=VSS,VDD; VDD=10V; Ta=85°C | 5 | ||
| Quiescent supply current | IDD | 600 | μA | VIN=VSS,VDD; VDD=15V; Ta=85°C | 5 | ||
| Input capacitance | CIN | 5 | 7.5 | pF | 5 | ||
| Propagation delay time (A, B, C, -OUT) | tpZL/tpZH/tpLZ/tpHZ | 170 | 550 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=VEE=0V; VDD=5V | 6 | |
| Propagation delay time (A, B, C, -OUT) | tpZL/tpZH/tpLZ/tpHZ | 90 | 240 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=VEE=0V; VDD=10V | 6 | |
| Propagation delay time (A, B, C, -OUT) | tpZL/tpZH/tpLZ/tpHZ | 70 | 160 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=VEE=0V; VDD=15V | 6 | |
| Propagation delay time (A, B, C, -OUT) | tpZL/tpZH/tpLZ/tpHZ | 100 | 240 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=0V; VEE=-5V; VDD=5V | 6 | |
| Propagation delay time (A, B, C, -OUT) | tpZL/tpZH/tpLZ/tpHZ | 80 | 160 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=0V; VEE=-7.5V; VDD=7.5V | 6 | |
| Propagation delay time (INH-OUT) | tpZL/tpZH | 120 | 380 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=VEE=0V; VDD=5V | 6 | |
| Propagation delay time (INH-OUT) | tpZL/tpZH | 60 | 200 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=VEE=0V; VDD=10V | 6 | |
| Propagation delay time (INH-OUT) | tpZL/tpZH | 50 | 160 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=VEE=0V; VDD=15V | 6 | |
| Propagation delay time (INH-OUT) | tpZL/tpZH | 80 | 200 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=0V; VEE=-5V; VDD=5V | 6 | |
| Propagation delay time (INH-OUT) | tpZL/tpZH | 60 | 160 | ns | Ta=25°C; CL=50pF; RL=1kΩ; VSS=0V; VEE=-7.5V; VDD=7.5V | 6 |
CAD (KiCad official)
- Symbol:
TC4052BFT - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
tc4052bft-etched.step/tc4052bft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc4052bft.step/tc4052bft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (10 pp, sha256
e10803f3dbb81b26, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).