component
PDTC115EU
Public Made by Adomby adom
Nexperia Digital Transistors, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPDTC115EU
Nexperia · Digital Transistors · SOT-323
PDTC115EU from Nexperia, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | input | Input (base) with input voltage rating of -10 to 40 V; on-state input voltage minimum 3 V at IC = 1 mA and VCE = 0.3 V. |
| 2 | GND | power_in | Ground connection (emitter). |
| 3 | O | output | Output (collector) with maximum collector-emitter voltage of 50 V and maximum output current of 20 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-323 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
PDTC115EU - Footprint:
Package_TO_SOT_SMD:SOT-323_SC-70 - 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files:
pdtc115eu-etched.step/pdtc115eu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pdtc115eu.step/pdtc115eu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (7 pp, sha256
9d0fe1ef28c825e3, retrieved 2026-09-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).