Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

STM32G030K8T6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32G030K8T6TR from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB9 bidirectional Port B bit 9. 5 V-tolerant FT_f I/O. Default GPIO after reset (analog input). Alternate: IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT.
2 PC14-OSC32_IN bidirectional Port C bit 14 / LSE 32 kHz crystal input. 5 V-tolerant FT I/O. Additional function OSC32_IN (LSE oscillator). Alternate: TIM1_BK2. Supplied through the RTC/backup power switch; drive current limited to ~3 mA.
3 PC15-OSC32_OUT bidirectional Port C bit 15 / LSE 32 kHz crystal output. 5 V-tolerant FT I/O. Additional function OSC32_OUT. Alternate: OSC32_EN, OSC_EN. Supplied through the RTC/backup power switch.
4 VDD/VDDA power_in Combined digital and analog positive supply. Operating range 2.0 V to 3.6 V. Bypass with the recommended decoupling network.
5 VSS/VSSA power_in Combined digital and analog ground reference (0 V).
6 NRST bidirectional Active-low system reset. Bidirectional RST-type pin with an embedded weak pull-up. Drive low to reset the device; internally asserted low during POR/BOR.
7 PA0 bidirectional Port A bit 0. FT_a 5 V-tolerant I/O with analog switch. Alternate: SPI2_SCK, USART2_CTS. Additional: ADC_IN0, TAMP_IN2, WKUP1. Default at reset: analog input.
8 PA1 bidirectional Port A bit 1. FT_ea 5 V-tolerant I/O with analog switch and diode to VDD. Alternate: SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, I2C1_SMBA, EVENTOUT. Additional: ADC_IN1.
9 PA2 bidirectional Port A bit 2. FT_a I/O. Alternate: SPI1_MOSI/I2S1_SD, USART2_TX. Additional: ADC_IN2, WKUP4, LSCO.
10 PA3 bidirectional Port A bit 3. FT_ea I/O. Alternate: SPI2_MISO, USART2_RX, EVENTOUT. Additional: ADC_IN3.
11 PA4 bidirectional Port A bit 4. FT_a I/O. Alternate: SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, EVENTOUT. Additional: ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2.
12 PA5 bidirectional Port A bit 5. FT_ea I/O. Alternate: SPI1_SCK/I2S1_CK, EVENTOUT. Additional: ADC_IN5.
13 PA6 bidirectional Port A bit 6. FT_ea I/O. Alternate: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1. Additional: ADC_IN6.
14 PA7 bidirectional Port A bit 7. FT_a I/O. Alternate: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1. Additional: ADC_IN7.
15 PB0 bidirectional Port B bit 0. FT_ea I/O. Alternate: SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N. Additional: ADC_IN8.
16 PB1 bidirectional Port B bit 1. FT_ea I/O. Alternate: TIM14_CH1, TIM3_CH4, TIM1_CH3N, EVENTOUT. Additional: ADC_IN9.
17 PB2 bidirectional Port B bit 2. FT_ea I/O. Alternate: SPI2_MISO, EVENTOUT. Additional: ADC_IN10.
18 PA8 bidirectional Port A bit 8. FT I/O. Alternate: MCO, SPI2_NSS, TIM1_CH1, EVENTOUT.
19 PA9 bidirectional Port A bit 9. FT_f (Fm+ capable) I/O. Alternate: MCO, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, EVENTOUT.
20 PC6 bidirectional Port C bit 6. FT I/O. Alternate: TIM3_CH1.
21 PA10 bidirectional Port A bit 10. FT_f (Fm+ capable) I/O. Alternate: SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BK, I2C1_SDA, EVENTOUT.
22 PA11 [PA9] bidirectional Port A bit 11 (remappable to PA9 via SYSCFG_CFGR1). FT_fa I/O (Fm+ capable, analog switch). Alternate: SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL. Additional: ADC_IN15.
23 PA12 [PA10] bidirectional Port A bit 12 (remappable to PA10 via SYSCFG_CFGR1). FT_fa I/O. Alternate: SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA. Additional: ADC_IN16.
24 PA13 bidirectional SWDIO by default after reset (SW debug data). FT_ea I/O with internal pull-up enabled at reset. Alternate: SWDIO, IR_OUT, EVENTOUT. Additional: ADC_IN17.
25 PA14-BOOT0 bidirectional SWCLK by default after reset (SW debug clock) and BOOT0 selector. FT_a I/O with internal pull-down enabled at reset. Alternate: SWCLK, USART2_TX, EVENTOUT. Additional: ADC_IN18, BOOT0.
26 PA15 bidirectional Port A bit 15. FT I/O. Alternate: SPI1_NSS/I2S1_WS, USART2_RX, EVENTOUT.
27 PB3 bidirectional Port B bit 3. FT I/O. Alternate: SPI1_SCK/I2S1_CK, TIM1_CH2, USART1_RTS_DE_CK, EVENTOUT.
28 PB4 bidirectional Port B bit 4. FT I/O. Alternate: SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BK, EVENTOUT.
29 PB5 bidirectional Port B bit 5. FT I/O. Alternate: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BK, I2C1_SMBA. Additional: WKUP6.
30 PB6 bidirectional Port B bit 6. FT_f (Fm+ capable) I/O. Alternate: USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT.
31 PB7 bidirectional Port B bit 7. FT_fa I/O (Fm+ capable, analog switch). Alternate: USART1_RX, SPI2_MOSI, TIM17_CH1N, I2C1_SDA, EVENTOUT. Additional: ADC_IN11.
32 PB8 bidirectional Port B bit 8. FT_f (Fm+ capable) I/O. Alternate: SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category MCU
Pins 32

Ordering variants

Same part, different packaging or reel option.

  • STM32G030K8T6TRK6T
  • STM32G030K8T6TR
  • STM32G030K8T6TRC6T
  • STM32G030K8T6TRC8T
  • STM32G030K8T6TRF6P
  • STM32G030K8T6TRF8P
  • STM32G030K8T6TRJ6M
  • STM32G030K8T6TRJ8M

CAD (KiCad official)

  • Symbol: STM32G030K8T6TR
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (93 pp, sha256 bd4d70f72b2e82c5, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF