AD5252BRUZ1 from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Positive power supply pin; connect +2.7 V to +5 V for single supply or ±2.7 V for dual supply, where VDD - VSS ≤ 5.5 V, and it must be able to source 35 mA for 26 ms when storing data to EEMEM.
2	AD0	input	I2C device address bit 0; AD0 and AD1 allow four AD5251/AD5252 devices to be addressed.
3	WP	input	Write protect, active low; VWP must not exceed VDD + 0.3 V.
4	W1	passive	Wiper terminal of RDAC1; VSS ≤ VW1 ≤ VDD.
5	B1	passive	B terminal of RDAC1; VSS ≤ VB1 ≤ VDD.
6	A1	passive	A terminal of RDAC1; VSS ≤ VA1 ≤ VDD.
7	SDA	bidirectional	Serial data input/output, open-drain MOSFET that shifts in one bit at a time on positive clock edges with MSB loaded first and requires a pull-up resistor.
8	VSS	power_in	Negative supply; connect to 0 V for single supply or -2.7 V for dual supply, where VDD - VSS ≤ +5.5 V, and it must be able to sink 35 mA for 26 ms when storing data to EEMEM in dual supply use.
9	SCL	input	Serial input register clock that shifts in one bit at a time on positive clock edges; VSCL ≤ (VDD + 0.3 V), and a pull-up resistor is recommended to ensure minimum power.
10	DGND	power_in	Digital ground; connect to system analog ground at a single point.
11	AD1	input	I2C device address bit 1; AD0 and AD1 allow four AD5251/AD5252 devices to be addressed.
12	A3	passive	A terminal of RDAC3; VSS ≤ VA3 ≤ VDD.
13	B3	passive	B terminal of RDAC3; VSS ≤ VB3 ≤ VDD.
14	W3	passive	Wiper terminal of RDAC3; VSS ≤ VW3 ≤ VDD.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-14
Category	ADC/DAC/Data Conversion
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Resistor Differential Nonlinearity R-DNL, VDD=5.5 V	R-DNL	-1	0.25	1	LSB	RWB, RWA = NC, VDD = 5.5 V, AD5252	3
Resistor Differential Nonlinearity R-DNL, VDD=2.7 V	R-DNL	-1.5	0.3	1.5	LSB	RWB, RWA = NC, VDD = 2.7 V, AD5252	3
Resistor Nonlinearity R-INL, VDD=5.5 V	R-INL	-2	0.5	2	LSB	RWB, RWA = NC, VDD = 5.5 V, AD5252	3
Resistor Nonlinearity R-INL, VDD=2.7 V	R-INL	-2	9	14	LSB	RWB, RWA = NC, VDD = 2.7 V, AD5252	3
Nominal Resistor Tolerance	ΔRAB/RAB	-30		30	%	TA = 25°C	3
Differential Nonlinearity DNL	DNL	-1	0.25	1	LSB	AD5252	3
Integral Nonlinearity INL	INL	-2	0.5	2	LSB	AD5252	3
Full-Scale Error, VDD=5.5 V	VWFSE	-16	-11	0	LSB	Code = full scale, VDD = 5.5 V, AD5252	3
Full-Scale Error, VDD=2.7 V	VWFSE	-23	-16	0	LSB	Code = full scale, VDD = 2.7 V, AD5252	3
Zero-Scale Error, VDD=5.5 V	VWZSE	0	11	16	LSB	Code = zero scale, VDD = 5.5 V, AD5252	3
Zero-Scale Error, VDD=2.7 V	VWZSE	0	15	20	LSB	Code = zero scale, VDD = 2.7 V, AD5252	3
Common-Mode Leakage Current	ICM		0.01	1	µA	VA = VB = VDD/2	3
Input Logic High	VIH	2.4			V	VDD = 5 V, VSS = 0 V	3
Input Logic High	VIH	2.1			V	VDD/VSS = 2.7 V/0 V or VDD/VSS = ± 2.5 V	3
Input Logic Low	VIL			0.8	V	VDD = 5 V, VSS = 0 V	3
Output Logic High (SDA)	VOH	4.9			V	RPULL-UP = 2.2 kΩ to VDD = 5 V, VSS = 0 V	3
Output Logic Low (SDA)	VOL			0.4	V	RPULL-UP = 2.2 kΩ to VDD = 5 V, VSS = 0 V	3
WP Leakage Current	IWP			8	µA	WP = VDD	4
A0 Leakage Current	IA0			3	µA	A0 = GND	4
Input Leakage Current (other than WP and A0)	II	-1		1	µA	VIN = 0 V or VDD	4
Single-Supply Power Range	VDD	2.7		5.5	V	VSS = 0 V	4
Dual-Supply Power Range	VDD/VSS	2.25		2.75	V		4
Positive Supply Current	IDD		5	15	µA	VIH = VDD or VIL = GND	4
Negative Supply Current	ISS		-5	-15	µA	VIH = VDD or VIL = GND, VDD = 2.5 V, VSS = -2.5 V	4
EEMEM Data Storing Mode Current	IDD_STORE			35	mA	VIH = VDD or VIL = GND	4
EEMEM Data Restoring Mode Current	IDD_RESTORE			2.5	mA	VIH = VDD or VIL = GND	4
Power Dissipation	PDISS			0.075	mW	VIH = VDD = 5 V or VIL = GND	4
Power Supply Sensitivity, ΔVDD = 5 V ± 10%	PSS	-0.025	0.01	0.025	%/%	ΔVDD = 5 V ± 10%	4
Power Supply Sensitivity, ΔVDD = 3 V ± 10%	PSS	-0.04	0.02	0.04	%/%	ΔVDD = 3 V ± 10%	4
Wiper Resistance, VDD=5 V	RW		75	130	Ω	IW = 1 V/R, VDD = 5 V	3
Wiper Resistance, VDD=3 V	RW		200	300	Ω	IW = 1 V/R, VDD = 3 V	3
Operating Temperature Range	TA	-40		105	°C		8
VDD to GND	VDD	-0.3		7	V		8
VSS to GND	VSS	-7		0.3	V		8
VDD to VSS	VDD-VSS			7	V		8
Digital Inputs and Output Voltage to GND		0		7	V		8
Operating Temperature Range		-40		105	°C		8
Maximum Junction Temperature	TJMAX			150	°C		8
Storage Temperature Range		-65		150	°C		8
Lead Temperature (Soldering, 10 sec)				300	°C		8
Maximum Continuous Current IWB, IWA (RWB ≤ 1 kΩ)	IWB, IWA	-5		5	mA	RWB ≤ 1 kΩ, A open	8
Maximum Pulsed Current IWB, IWA	IWB, IWA	-20		20	mA	Pulsed	8
Maximum Continuous Current IAB, RAB = 1 kΩ	IAB	-5		5	mA	RAB = 1 kΩ	8
Thermal Resistance Junction to Ambient, 14-Lead TSSOP	θJA		126.8		°C/W	JEDEC natural convection	8
Thermal Resistance Junction to Board, 14-Lead TSSOP	θJB		64.6		°C/W	JEDEC θJB environment	8
Resistance Temperature Coefficient	(ΔRAB/RAB)×10^6/ΔT		650		ppm/°C		4
Voltage Divider Temperature Coefficient	(ΔVW/VW)×10^6/ΔT		25		ppm/°C	Code = half scale	4
Capacitance A, B	CA, CB		85		pF	f = 1 kHz, measured to GND, code = half scale	3
Capacitance W	CW		95		pF	f = 1 kHz, measured to GND, code = half scale	3
Input Capacitance	CI		5		pF		4
Bandwidth -3 dB, RAB = 1 kΩ	BW		4		MHz	RAB = 1 kΩ	4
Total Harmonic Distortion	THD		0.05		%	VA = 1 V rms, VB = 0 V, f = 1 kHz	4
VW Settling Time	tS		0.2		µs	VA = VDD, VB = 0 V	4
Resistor Noise Voltage	eN_WB		3		nV/√Hz	RWB = 500 Ω, f = 1 kHz (thermal noise only)	4
Digital Crosstalk	CT		-80		dB	VA = VDD, VB = 0 V, measure VW with adjacent RDAC making full-scale change	4
Analog Coupling	CAT		-72		dB	Signal input at A1 and measure the output at W3, f = 1 kHz	4

CAD (KiCad official)

Symbol: AD5252BRUZ1
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: ad5252bruz1-etched.step / ad5252bruz1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5252bruz1.step / ad5252bruz1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (28 pp, sha256 5264e94822a7ec07, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD5252BRUZ1

Verified AD5252BRUZ1

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3D Model

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