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Contents

README

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PDTC114TE

Shanghai Prisemi Elec · Digital Transistors · SOT-523

PDTC114TE from Shanghai Prisemi Elec, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Base of the NPN digital transistor, driven through the built-in 10 kΩ input resistor R1 (7 to 13 kΩ).
2 E passive Emitter of the NPN digital transistor; emitter-base breakdown voltage BVEBO is 5 V min and absolute maximum VEBO is 5 V.
3 C passive Collector of the NPN digital transistor; VCEO is 50 V max and IC is 100 mA max.

Key specifications

Parameter Value
Manufacturer Shanghai Prisemi Elec
Package SOT-523
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-base breakdown voltage BVCBO 50 V IC =50µA 1
Collector-emitter breakdown voltage BVCEO 50 V IC=1mA 1
Emitter-base breakdown voltage BVEBO 5 V IE=50µA 1
Collector cutoff current ICBO 0.5 μA VCB=50V 1
Emitter cutoff current IEBO 0.5 μA VEB=4V 1
Collector-emitter saturation voltage VCE(sat) 0.3 V IC/IB=5mA/0.25mA 1
DC current transfer ratio hFE 100 250 600 - IC=1mA, VCE=5V 1
Input resistance R1 7 10 13 kΩ 1
Transition frequency fT 250 MHz VCE=10V, IE= −5mA, f=100MHz 1
Collector-base voltage VCBO 50 V @25℃ 2
Collector-emitter voltage VCEO 50 V @25℃ 2
Emitter-base voltage VEBO 5 V @25℃ 2
Collector current IC 100 mA @25℃ 2
Collector power dissipation PC 150 mW @25℃ 2
Junction temperature Tj 150 ℃ @25℃ 2
Storage temperature Tstg -55 150 ℃ @25℃ 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Lead finish:100% matte Sn(Tin)  Mounting position: Any 1

CAD (KiCad official)

  • Symbol: PDTC114TE
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: pdtc114te-etched.step / pdtc114te-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtc114te.step / pdtc114te.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Prisemi Elec datasheet (5 pp, sha256 8d2fcd741e15d372, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF