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LMK1D2108RGZR
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLMK1D2108RGZR
Texas Instruments · Clock Buffers, Drivers, Distributors · VQFN-48-EP(7x7)
LMK1D2108RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground |
| 2 | EN | input | Output bank enable/disable with internal 500-kΩ pullup and 320-kΩ pulldown |
| 3 | IN1_P | input | Secondary differential clock input pair (positive), or single-ended input |
| 4 | IN1_N | input | Secondary differential clock input pair (negative), or single-ended input |
| 5 | VAC_REF1 | output | Bias voltage output for capacitive coupled inputs; TI recommends 0.1-µF capacitor to GND |
| 6 | VDDB | power_in | Device power supply (1.8V, 2.5V, or 3.3V) for Bank 1 |
| 7 | VDDA | power_in | Device power supply (1.8V, 2.5V, or 3.3V) for Bank 0 |
| 8 | VAC_REF0 | output | Bias voltage output for capacitive coupled inputs; TI recommends 0.1-µF capacitor to GND |
| 9 | IN0_P | input | Primary differential clock input pair (positive), or single-ended input |
| 10 | IN0_N | input | Primary differential clock input pair (negative), or single-ended input |
| 11 | AMP_SEL | input | Output amplitude swing select with internal 500-kΩ pullup and 320-kΩ pulldown |
| 12 | GND | power_in | Ground |
| 13 | VDDA | power_in | Device power supply (1.8V, 2.5V, or 3.3V) for Bank 0 |
| 14 | OUT0_P | output | Differential LVDS output pair 0 (positive) |
| 15 | OUT0_N | output | Differential LVDS output pair 0 (negative) |
| 16 | OUT1_P | output | Differential LVDS output pair 1 (positive) |
| 17 | OUT1_N | output | Differential LVDS output pair 1 (negative) |
| 18 | OUT2_P | output | Differential LVDS output pair 2 (positive) |
| 19 | OUT2_N | output | Differential LVDS output pair 2 (negative) |
| 20 | OUT3_P | output | Differential LVDS output pair 3 (positive) |
| 21 | OUT3_N | output | Differential LVDS output pair 3 (negative) |
| 22 | OUT4_P | output | Differential LVDS output pair 4 (positive) |
| 23 | OUT4_N | output | Differential LVDS output pair 4 (negative) |
| 24 | VDDA | power_in | Device power supply (1.8V, 2.5V, or 3.3V) for Bank 0 |
| 25 | OUT5_P | output | Differential LVDS output pair 5 (positive) |
| 26 | OUT5_N | output | Differential LVDS output pair 5 (negative) |
| 27 | OUT6_P | output | Differential LVDS output pair 6 (positive) |
| 28 | OUT6_N | output | Differential LVDS output pair 6 (negative) |
| 29 | OUT7_P | output | Differential LVDS output pair 7 (positive) |
| 30 | OUT7_N | output | Differential LVDS output pair 7 (negative) |
| 31 | OUT8_P | output | Differential LVDS output pair 8 (positive) |
| 32 | OUT8_N | output | Differential LVDS output pair 8 (negative) |
| 33 | OUT9_P | output | Differential LVDS output pair 9 (positive) |
| 34 | OUT9_N | output | Differential LVDS output pair 9 (negative) |
| 35 | OUT10_P | output | Differential LVDS output pair 10 (positive) |
| 36 | OUT10_N | output | Differential LVDS output pair 10 (negative) |
| 37 | VDDB | power_in | Device power supply (1.8V, 2.5V, or 3.3V) for Bank 1 |
| 38 | OUT11_P | output | Differential LVDS output pair 11 (positive) |
| 39 | OUT11_N | output | Differential LVDS output pair 11 (negative) |
| 40 | OUT12_P | output | Differential LVDS output pair 12 (positive) |
| 41 | OUT12_N | output | Differential LVDS output pair 12 (negative) |
| 42 | OUT13_P | output | Differential LVDS output pair 13 (positive) |
| 43 | OUT13_N | output | Differential LVDS output pair 13 (negative) |
| 44 | OUT14_P | output | Differential LVDS output pair 14 (positive) |
| 45 | OUT14_N | output | Differential LVDS output pair 14 (negative) |
| 46 | OUT15_P | output | Differential LVDS output pair 15 (positive) |
| 47 | OUT15_N | output | Differential LVDS output pair 15 (negative) |
| 48 | VDDB | power_in | Device power supply (1.8V, 2.5V, or 3.3V) for Bank 1 |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Clock/Timing |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
LMK1D2108RGZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
lmk1d2108rgzr-etched.step/lmk1d2108rgzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmk1d2108rgzr.step/lmk1d2108rgzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
5faeb5c6531c9194, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).