component
RJM32F103CBT6Y
Public Made by Adomby adom
Runjet(瑞纳捷) Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRJM32F103CBT6Y
Runjet(瑞纳捷) · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
RJM32F103CBT6Y from Runjet(瑞纳捷), in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply, 1.8 to 3.6V, powers the RTC and backup registers when VDD is absent. |
| 2 | PC13 | bidirectional | General-purpose I/O PC13, also TAMPER/RTC function as printed in the pin table. |
| 3 | PC14 | bidirectional | General-purpose I/O PC14, with OSC32_IN listed as its function in the pin table. |
| 4 | PC15 | bidirectional | General-purpose I/O PC15, with OSC32_OUT listed as its function in the pin table. |
| 5 | PD0 | bidirectional | Port D I/O PD0 used as OSC_IN, the input for the 4 to 16MHz crystal oscillator (HSE, typical 8MHz). |
| 6 | PD1 | bidirectional | Port D I/O PD1 used as OSC_OUT, the output of the 4 to 16MHz crystal oscillator (HSE). |
| 7 | NRST | bidirectional | Hardware reset pin; an external reset on NRST resets the chip. |
| 8 | VSSA | power_in | Analog ground pin for the analog section. |
| 9 | VDDDA | power_in | Analog supply pin (printed as VDDDA); VDDA must be 2.4 to 3.6V when the ADC is used and should be powered from the same supply as VDD, with at most 300mV difference. |
| 10 | PA0 | bidirectional | GPIO PA0 with WKUP wake-up input (rising edge exits standby) and ADC_IN0 analog input. |
| 11 | PA1 | bidirectional | GPIO PA1 with TIM2_CH2, UART2_RTS and ADC_IN1 functions. |
| 12 | PA2 | bidirectional | GPIO PA2 with TIM2_CH3, UART2_TX and ADC_IN2 functions. |
| 13 | PA3 | bidirectional | GPIO PA3 with TIM2_CH4, UART2_RX and ADC_IN3 functions. |
| 14 | PA4 | bidirectional | GPIO PA4 with QSPI_NSS0, SPIS1_NSS, UART2_CK and ADC_IN4 functions. |
| 15 | PA5 | bidirectional | GPIO PA5 with QSPI_SCK, SPIS1_SCK and ADC_IN5 functions. |
| 16 | PA6 | bidirectional | GPIO PA6 with TIM1_BKIN, TIM3_CH1, QSPI_MI_IO1, SPIS1_SO and ADC_IN6 functions. |
| 17 | PA7 | bidirectional | GPIO PA7 with TIM1_CH1N, TIM3_CH2, QSPI_MO_IO0, SPIS1_SI and ADC_IN7 functions. |
| 18 | PB0 | bidirectional | GPIO PB0 with TIM1_CH2N, TIM3_CH3, I2S_MCLK, QSPI_IO2 and ADC_IN8 functions. |
| 19 | PB1 | bidirectional | GPIO PB1 with TIM1_CH3N, TIM3_CH4, QSPI_IO3 and ADC_IN9 functions. |
| 20 | PB2 | bidirectional | GPIO PB2 that is also the BOOT1 boot-mode pin, used with BOOT0 to select the boot source. |
| 21 | PB10 | bidirectional | GPIO PB10 with TIM2_CH3, TIM4_CH1, I2C2_SCL, QSPI_NSS2 and UART3_TX functions. |
| 22 | PB11 | bidirectional | GPIO PB11 with TIM2_CH4, I2C2_SDA, SPIM2_NSS1 and UART3_RX functions. |
| 23 | VSS_1 | power_in | Ground pin for the digital supply domain. |
| 24 | VDD_1 | power_in | Main supply pin for I/O and the internal regulator, 2.0 to 3.6V. |
| 25 | PB12 | bidirectional | GPIO PB12 with TIM1_BKIN, I2S_WS, LED4, SPIM2_NSS0, SPIS2_NSS and UART3_CK functions. |
| 26 | PB13 | bidirectional | GPIO PB13 with TIM1_CH1N, I2S_SCLK, LED5, SPIM2_SCK, SPIS2_SCK and UART3_CTS functions. |
| 27 | PB14 | bidirectional | GPIO PB14 with TIM1_CH2N, LED6, SPIM2_MI, SPIS2_SO and UART3_RTS functions. |
| 28 | PB15 | bidirectional | GPIO PB15 with TIM1_CH3N, LED7, SPIM2_MO, SPIS2_SI and I2S_SD0 functions. |
| 29 | PA8 | bidirectional | GPIO PA8 with TIM1_CH1, LED0, UART1_CK, MCO and CMPA_P0 functions. |
| 30 | PA9 | bidirectional | GPIO PA9 with TIM1_CH2, LED1, UART1_TX and CMPA_N0 functions. |
| 31 | PA10 | bidirectional | GPIO PA10 with TIM1_CH3, LED2 and UART1_RX functions. |
| 32 | PA11 | bidirectional | GPIO PA11 with TIM1_CH4, LED3, UART1_CTS and USBDM functions. |
| 33 | PA12 | bidirectional | GPIO PA12 with TIM1_ETR, UART1_RTS and USBDP functions. |
| 34 | PA13 | bidirectional | GPIO PA13 with SWDIO, QSPI_NSS1 and CMPA_P3 functions. |
| 35 | VSS_2 | power_in | Ground pin for the digital supply domain. |
| 36 | VDD_2 | power_in | Supply pin for I/O and the internal regulator, 2.0 to 3.6V. |
| 37 | PA14 | bidirectional | GPIO PA14 with SWDCLK, QSPI_NSS2 and CMPA_N3 functions. |
| 38 | PA15 | bidirectional | GPIO PA15 with TIM2_CH1_ETR, I2S_WS, I2C1_SMBAI, QSPI_NSS0, SPIS1_NSS and CMPB_P3 functions. |
| 39 | PB3 | bidirectional | GPIO PB3 with SWO, TIM2_CH2, I2S_SCLK, QSPI_SCK, SPIS1_SCK and CMPB_N3 functions. |
| 40 | PB4 | bidirectional | GPIO PB4 with TIM3_CH1, QSPI_MI_IO1, SPIS1_SO and CMPA_P1 functions. |
| 41 | PB5 | bidirectional | GPIO PB5 with TIM3_CH2, I2S_SD1, I2C1_SMBAI, QSPI_MO_IO0, SPIS1_SI and CMPA_P2 functions. |
| 42 | PB6 | bidirectional | GPIO PB6 with TIM4_CH1, I2C1_SCL, QSPI_NSS1, UART1_TX and CMPA_N1 functions. |
| 43 | PB7 | bidirectional | GPIO PB7 with TIM4_CH2, I2C1_SDA, SPIM2_NSS1, UART1_RX and CMPA_N2 functions. |
| 44 | BOOT0 | input | Boot-mode select input that, together with BOOT1, chooses boot from user Flash, system memory or embedded SRAM. |
| 45 | PB8 | bidirectional | GPIO PB8 with TIM4_CH3, I2C1_SCL, SPIM2_NSS2, UART1_CTS and CMPB_N1 functions. |
| 46 | PB9 | bidirectional | GPIO PB9 with TIM4_CH4, I2C1_SDA, UART1_RTS and CMPB_N2 functions. |
| 47 | VSS_3 | power_in | Ground pin for the digital supply domain. |
| 48 | VDD_3 | power_in | Supply pin for I/O and the internal regulator, 2.0 to 3.6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Runjet(瑞纳捷) |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VDD and VDDA) | VDD, VSS | -0.5 | 3.6 | V | 25 | ||
| Total current through VDD/VDDA supply lines | IVDD | 60 | mA | 25 | |||
| Total current through VSS ground lines | IVSS | 60 | mA | 25 | |||
| Output sink current on any I/O and control pin | IIO | 16 | mA | 25 | |||
| Output source current on any I/O and control pin | IIO | -16 | mA | 25 | |||
| Injection current on any pin | IINJ(PIN) | -5 | 5 | mA | 25 | ||
| Total injection current | ΣIINJ(PIN) | -25 | 25 | mA | 25 | ||
| Storage temperature range | TSTG | -45 | 150 | ℃ | 26 | ||
| Maximum junction temperature | TJ | 100 | ℃ | 26 | |||
| Internal AHB clock frequency | fHCLK | 72 | MHz | 26 | |||
| Internal APB1 clock frequency | fPCLK1 | 72 | MHz | 26 | |||
| Internal APB2 clock frequency | fPCLK2 | 72 | MHz | 26 | |||
| Standard operating voltage | VDD | 2 | 3.6 | V | 26 | ||
| Analog operating voltage (ADC not used) | VDDA | 2 | 3.6 | V | 未使用 ADC | 26 | |
| Backup-domain operating voltage | VBAT | 1.8 | 3.6 | V | 26 | ||
| Ambient temperature | T | -40 | 85 | ℃ | 26 | ||
| ADC analog supply voltage | VDDA | 2.4 | 3.6 | V | 33 | ||
| ADC sampling rate | fS | 0.05 | 1 | MHz | 33 | ||
| ADC external trigger frequency | fTRIG | 823 | KHz | fADC= 14MHz | 33 | ||
| ADC conversion voltage range | VAIN | 0 | V | 33 | |||
| ADC external input impedance | RAIN | 200 | Ω | 33 | |||
| ADC analog input junction leakage current | Ilkg | 10 | uA | 34 | |||
| ADC sampling rate (12-bit) | FCONV | 940 | KSPS | 12bit | 34 | ||
| Comparator input voltage range | Vin | 0.6 | V | 33 | |||
| Comparator hysteresis | VHYST | 2 | 5 | mV | 33 | ||
| Comparator input offset voltage | VOFF | 5 | 15 | mV | 33 | ||
| Comparator propagation delay | TPGD | 200 | nS | 33 | |||
| Comparator operating current | Iq | 8.5 | uA | 33 | |||
| USB operating voltage | VDD | 3 | 3.6 | V | 32 | ||
| Differential input sensitivity | VDI | 0.2 | V | (USBDP, USBDM) | 32 | ||
| Differential common-mode range | VCM | 0.8 | 2.5 | V | Includes VDI range | 32 | |
| Single-ended receiver threshold | VSE | 1.3 | 2 | V | 32 | ||
| Static output low level | VOL | 0.3 | V | RL of1.5kom to3.6V | 32 | ||
| Static output high level | VOH | 2.8 | 3.6 | V | RL of15kom toVSSV | 32 | |
| USB full-speed rise time | tr | 4 | 20 | ns | CL= 50 pF | 33 | |
| USB full-speed fall time | tf | 4 | 20 | ns | CL= 50 pF | 33 | |
| USB rise/fall time matching (tr/tf) | trfm | 90 | 110 | % | 33 | ||
| Timer resolution time | Tres (TIM) | 1 | TTIMxCLK | 32 | |||
| Timer resolution | RESTIM | 20 | bit | 32 | |||
| 16-bit counter clock period (internal clock selected) | Tcounter | 1 | 65536 | TTIMxCLK | 选择内部时钟时 | 32 | |
| Timer external clock frequency on CH1 to CH4 | FEXT | 0 | MHz | CH1 至 CH4 | 32 | ||
| Input low-level voltage | VIL | -0.5 | V | 31 | |||
| I/O input leakage current | Ilkg | -1 | 1 | uA | VSS ≤ Vin ≤ VDD | 31 | |
| Weak pull-up equivalent resistance | Rpu | 30 | 40 | 50 | kΩ | Vin=VSS | 31 |
| Weak pull-down equivalent resistance | Rpd | 30 | 40 | 50 | kΩ | Vin=VDD | 31 |
| Maximum output frequency, speed x0 | fmax(IO)out | 10 | MHz | CL=50pF,VDD=2V to 3.6V | 32 | ||
| Maximum output frequency, speed x1 | fmax(IO)out | 50 | MHz | CL=50pF,VDD=2V to 3.6V | 32 | ||
| Page program current | IDDPROG | 2 | mA | 30 | |||
| Page erase current | IDD ERASE | 1.5 | mA | 30 | |||
| Read mode current | IDD READ | 4.7 | mA | @48MHz | 30 | ||
| Read mode current | IDD READ | 2.5 | mA | @24MHz | 30 | ||
| Endurance (program/erase cycles) | NEND | 100 | kcycles | 30 | |||
| Data retention period | tRET | 10 | year | 30 | |||
| User external clock source frequency (HSE) | fHSEext | 8 | 16 | MHz | 28 | ||
| HSE clock duty cycle | DuCy(HSE) | 45 | 55 | % | 28 | ||
| MHSI clock startup time | TSU(MHSI) | 1 | 2 | us | VSS ≤ Vin ≤ VDD | 29 | |
| FHSI clock startup time | TSU (FHSI) | 200 | 500 | ns | VSS ≤ Vin ≤ VDD | 29 | |
| LSI frequency | fLSI | 20 | 40 | KHz | 29 | ||
| PLL input clock frequency | fPLLIN | 1 | 8 | 16 | MHz | 29 | |
| PLL input clock duty cycle | 40 | 60 | % | 29 |
CAD (KiCad official)
- Symbol:
RJM32F103CBT6Y - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
rjm32f103cbt6y-etched.step/rjm32f103cbt6y-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rjm32f103cbt6y.step/rjm32f103cbt6y.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Runjet(瑞纳捷) datasheet (41 pp, sha256
f545b5d24ed62228, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).