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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32L071K8U6

STMicroelectronics · Global Sourcing Parts · UFQFPN-32(5x5)

STM32L071K8U6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PC14-OSC32_IN	bidirectional	5 V tolerant (FT) I/O PC14 that also serves as the OSC32_IN additional function for the 32 kHz LSE oscillator; no alternate functions listed.
2	PC15-OSC32_OUT	bidirectional	Standard 3.3 V (TC) I/O PC15 that also serves as the OSC32_OUT additional function for the 32 kHz LSE oscillator.
3	NRST	bidirectional	Bidirectional reset pin with embedded weak pull-up resistor.
4	VSSA	power_in	Analog ground supply pin.
5	VDDA	power_in	Analog power supply pin; minimum 1.65 V per the revision history for Table 25.
6	PA0	bidirectional	I/O (TT_a structure) with TIM2_CH1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT alternate functions, plus COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1 additional functions.
7	PA1	bidirectional	5 V tolerant I/O with EVENTOUT, TIM2_CH2, USART2_RTS/DE, TIM21_ETR and USART4_RX alternate functions, plus COMP1_INP and ADC_IN1.
8	PA2	bidirectional	5 V tolerant I/O with TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX and COMP2_OUT alternate functions, plus COMP2_INM and ADC_IN2.
9	PA3	bidirectional	5 V tolerant I/O with TIM21_CH2, TIM2_CH4, USART2_RX and LPUART1_RX alternate functions, plus COMP2_INP and ADC_IN3.
10	PA4	bidirectional	Standard 3.3 V (TC) I/O with SPI1_NSS, USART2_CK and TIM22_ETR alternate functions, plus COMP1_INM, COMP2_INM and ADC_IN4.
11	PA5	bidirectional	Standard 3.3 V (TC) I/O with SPI1_SCK, TIM2_ETR and TIM2_CH1 alternate functions, plus COMP1_INM, COMP2_INM and ADC_IN5.
12	PA6	bidirectional	5 V tolerant I/O with SPI1_MISO, TIM3_CH1, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT alternate functions, plus ADC_IN6.
13	PA7	bidirectional	5 V tolerant I/O with SPI1_MOSI, TIM3_CH2, TIM22_CH2, EVENTOUT and COMP2_OUT alternate functions, plus ADC_IN7.
14	PB0	bidirectional	5 V tolerant I/O with EVENTOUT and TIM3_CH3 alternate functions, plus ADC_IN8 and VREF_OUT.
15	PB1	bidirectional	5 V tolerant I/O with TIM3_CH4 and LPUART1_RTS/DE alternate functions, plus ADC_IN9 and VREF_OUT.
16	VSS	power_in	Digital ground supply pin.
17	VDD	power_in	Digital power supply pin; device supply range is 1.65 V to 3.6 V (1.8 V to 3.6 V on versions without option D).
18	PA8	bidirectional	5 V tolerant, Fast Mode Plus capable I/O with MCO, EVENTOUT, USART1_CK and I2C3_SCL alternate functions.
19	PA9	bidirectional	5 V tolerant, Fast Mode Plus capable I/O with MCO, USART1_TX, I2C1_SCL and I2C3_SMBA alternate functions.
20	PA10	bidirectional	5 V tolerant, Fast Mode Plus capable I/O with USART1_RX and I2C1_SDA alternate functions.
21	PA11	bidirectional	I/O supplied by VDDIO2 with SPI1_MISO, EVENTOUT, USART1_CTS and COMP1_OUT alternate functions.
22	PA12	bidirectional	I/O supplied by VDDIO2 with SPI1_MOSI, EVENTOUT, USART1_RTS/DE and COMP2_OUT alternate functions.
23	PA13	bidirectional	5 V tolerant I/O that is SWDIO (serial wire debug data) after reset, with LPUART1_RX as an alternate function.
24	VDDIO2	power_in	Separate supply pin for the PA11 and PA12 I/Os.
25	PA14	bidirectional	5 V tolerant I/O that is SWCLK (serial wire debug clock) after reset, with USART2_TX and LPUART1_TX alternate functions.
26	PB4	bidirectional	5 V tolerant, Fast Mode Plus capable I/O with SPI1_MISO, TIM3_CH1, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA alternate functions, plus COMP2_INP.
27	PB5	bidirectional	5 V tolerant I/O with SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/DE alternate functions, plus COMP2_INP.
28	PB6	bidirectional	5 V tolerant, Fast Mode Plus capable I/O with USART1_TX, I2C1_SCL and LPTIM1_ETR alternate functions, plus COMP2_INP.
29	PB7	bidirectional	5 V tolerant, Fast Mode Plus capable I/O with USART1_RX, I2C1_SDA, LPTIM1_IN2 and USART4_CTS alternate functions, plus COMP2_INP and VREF_PVD_IN.
30	BOOT0	input	Dedicated boot mode selection input pin (I/O structure B).
31	VSS	power_in	Digital ground supply pin.
32	VDD	power_in	Digital power supply pin; device supply range is 1.65 V to 3.6 V (1.8 V to 3.6 V on versions without option D).
33	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	UFQFPN-32(5x5)
Category	Global Sourcing Parts
Pins	33

CAD (KiCad official)

Symbol: STM32L071K8U6
Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
3D model files: stm32l071k8u6-etched.step / stm32l071k8u6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l071k8u6.step / stm32l071k8u6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (144 pp, sha256 da3ebcbd4ae9560f, retrieved 2026-10-05, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF