TLC2274CDR from UMW, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OUT	output	Output of op-amp channel 1. Rail-to-rail output stage; can source/sink up to ±50 mA (absolute max). Output swings within tens of mV of both supply rails under light load.
2	1IN-	input	Inverting input of op-amp channel 1. High-impedance CMOS input, typical bias current 1 pA. Input voltage must remain within VDD- - 0.3 V to VDD+.
3	1IN+	input	Non-inverting input of op-amp channel 1. High-impedance CMOS input, typical bias current 1 pA. Common-mode range includes the negative rail (VDD-).
4	VDD+	power_in	Positive (highest) supply pin. Single-supply operation up to +8 V absolute max; typical characterization at ±2.5 V split or +5 V single supply. Bypass locally with 0.1 µF to VDD-.
5	2IN+	input	Non-inverting input of op-amp channel 2. High-impedance CMOS input, typical bias current 1 pA. Common-mode range includes the negative rail.
6	2IN-	input	Inverting input of op-amp channel 2. High-impedance CMOS input, typical bias current 1 pA.
7	2OUT	output	Output of op-amp channel 2. Rail-to-rail output stage; ±50 mA absolute max output current.
8	3OUT	output	Output of op-amp channel 3. Rail-to-rail output stage; ±50 mA absolute max output current.
9	3IN-	input	Inverting input of op-amp channel 3. High-impedance CMOS input, typical bias current 1 pA.
10	3IN+	input	Non-inverting input of op-amp channel 3. High-impedance CMOS input, typical bias current 1 pA.
11	VDD-	power_in	Negative (lowest) supply pin. Tie to GND for single-supply operation, or to the negative rail for split-supply operation. Absolute max -8 V relative to the supply midpoint.
12	4IN+	input	Non-inverting input of op-amp channel 4. High-impedance CMOS input, typical bias current 1 pA.
13	4IN-	input	Inverting input of op-amp channel 4. High-impedance CMOS input, typical bias current 1 pA.
14	4OUT	output	Output of op-amp channel 4. Rail-to-rail output stage; ±50 mA absolute max output current.

Key specifications

Parameter	Value
Manufacturer	UMW
Package	SOP-14
Category	Op-amp/Cmp
Pins	14

Ordering variants

Same part, different packaging or reel option.

TLC2274CDR
TLC2274CDRIDR
TLC2274CDRID

CAD (KiCad official)

Symbol: TLC2274CDR
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOP-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tlc2274cdr.step`	195 KB	You want the bare part, or you mark your own boards.
`tlc2274cdr-etched.step`	2.1 MB	You want the part with `TLC2274CDR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 542 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: UMW datasheet (30 pp, sha256 ead5615846e4c74e, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF