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Contents

README

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ADS1242IPWT

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16

ADS1242IPWT from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Power supply, 2.7V to 5.25V supply range; absolute maximum VDD to GND is -0.3V to +6V.
2 XIN input Clock input; master clock rate is 1 to 5 MHz, and VIL for XIN is GND to GND + 0.05V.
3 XOUT output Clock output, used with a crystal or ceramic resonator.
4 PDWN input Active LOW power-down input; the power-down function shuts down the analog and digital circuits.
5 VREF+ power_in Positive differential reference input; reference input range is 0 to VDD, with VREF (REF IN+ minus REF IN-) of 0.1V to 1.25V (1.30V max) for RANGE = 0.
6 VREF- power_in Negative differential reference input; reference input range is 0 to VDD.
7 AIN0/D0 bidirectional Analog input 0 / data I/O 0; analog input range is GND - 0.1V to VDD + 0.1V with buffer OFF and GND + 0.05V to VDD - 1.5V with buffer ON, and the pin can be used as data input or output.
8 AIN1/D1 bidirectional Analog input 1 / data I/O 1; analog input range is GND - 0.1V to VDD + 0.1V with buffer OFF and GND + 0.05V to VDD - 1.5V with buffer ON, and the pin can be used as data input or output.
9 AIN2/D2 bidirectional Analog input 2 / data I/O 2; analog input range is GND - 0.1V to VDD + 0.1V with buffer OFF and GND + 0.05V to VDD - 1.5V with buffer ON, and the pin can be used as data input or output.
10 AIN3/D3 bidirectional Analog input 3 / data I/O 3; analog input range is GND - 0.1V to VDD + 0.1V with buffer OFF and GND + 0.05V to VDD - 1.5V with buffer ON, and the pin can be used as data input or output.
11 GND power_in Ground reference for the device.
12 CS input Active LOW chip select; DOUT goes tri-state immediately when CS goes HIGH.
13 DIN input Serial data input with Schmitt trigger input.
14 DOUT output Serial data output; goes tri-state immediately when CS goes HIGH.
15 SCLK input Serial clock input with Schmitt trigger input.
16 DRDY output Active LOW data-ready output.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: ADS1242IPWT
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ads1242ipwt-etched.step / ads1242ipwt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads1242ipwt.step / ads1242ipwt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 0bf7c17072b2c943, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF