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Contents

README

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SN74HC682DWR

Texas Instruments · Digital Comparators · SOIC-20

SN74HC682DWR from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P>Q output Active-low output that is low only when word P is greater than word Q; high otherwise.
2 P0 input Bit 0 of data word P, compared with Q0; CMOS input held at VCC or GND when unused.
3 Q0 input Bit 0 of data word Q, compared with P0; has a 100-kΩ pullup resistor to VCC.
4 P1 input Bit 1 of data word P, compared with Q1; CMOS input held at VCC or GND when unused.
5 Q1 input Bit 1 of data word Q, compared with P1; has a 100-kΩ pullup resistor to VCC.
6 P2 input Bit 2 of data word P, compared with Q2; CMOS input held at VCC or GND when unused.
7 Q2 input Bit 2 of data word Q, compared with P2; has a 100-kΩ pullup resistor to VCC.
8 P3 input Bit 3 of data word P, compared with Q3; CMOS input held at VCC or GND when unused.
9 Q3 input Bit 3 of data word Q, compared with P3; has a 100-kΩ pullup resistor to VCC.
10 GND power_in Ground reference pin.
11 P4 input Bit 4 of data word P, compared with Q4; CMOS input held at VCC or GND when unused.
12 Q4 input Bit 4 of data word Q, compared with P4; has a 100-kΩ pullup resistor to VCC.
13 P5 input Bit 5 of data word P, compared with Q5; CMOS input held at VCC or GND when unused.
14 Q5 input Bit 5 of data word Q, compared with P5; has a 100-kΩ pullup resistor to VCC.
15 P6 input Bit 6 of data word P, compared with Q6; CMOS input held at VCC or GND when unused.
16 Q6 input Bit 6 of data word Q, compared with P6; has a 100-kΩ pullup resistor to VCC.
17 P7 input Bit 7 of data word P, compared with Q7; CMOS input held at VCC or GND when unused.
18 Q7 input Bit 7 of data word Q, compared with P7; has a 100-kΩ pullup resistor to VCC.
19 P=Q output Active-low output that is low only when word P equals word Q; high otherwise.
20 VCC power_in Supply voltage, 2 V to 6 V recommended; bypass with a 0.1-μF capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74HC682DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hc682dwr-etched.step / sn74hc682dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc682dwr.step / sn74hc682dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 8425fad178567f78, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF