component
74HC14DMT
Public Made by Adomby adom
HGSEMI Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC14DMT
HGSEMI · Inverters · TSSOP-14
74HC14DMT from HGSEMI, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Schmitt-trigger input of inverter 1; the input voltage must stay between 0 and VCC per the recommended operating conditions. |
| 2 | Y1 | output | Inverted output of gate 1, the logic complement of A1 per the truth table, with output current limited to ±25 mA. |
| 3 | A2 | input | Schmitt-trigger input of inverter 2; the input voltage must stay between 0 and VCC per the recommended operating conditions. |
| 4 | Y2 | output | Inverted output of gate 2, the logic complement of A2 per the truth table, with output current limited to ±25 mA. |
| 5 | A3 | input | Schmitt-trigger input of inverter 3; the input voltage must stay between 0 and VCC per the recommended operating conditions. |
| 6 | Y3 | output | Inverted output of gate 3, the logic complement of A3 per the truth table, with output current limited to ±25 mA. |
| 7 | GND | power_in | Ground reference for the device; VCC or GND current is limited to ±50 mA. |
| 8 | Y4 | output | Inverted output of gate 4, the logic complement of A4 per the truth table, with output current limited to ±25 mA. |
| 9 | A4 | input | Schmitt-trigger input of inverter 4; the input voltage must stay between 0 and VCC per the recommended operating conditions. |
| 10 | Y5 | output | Inverted output of gate 5, the logic complement of A5 per the truth table, with output current limited to ±25 mA. |
| 11 | A5 | input | Schmitt-trigger input of inverter 5; the input voltage must stay between 0 and VCC per the recommended operating conditions. |
| 12 | Y6 | output | Inverted output of gate 6, the logic complement of A6 per the truth table, with output current limited to ±25 mA. |
| 13 | A6 | input | Schmitt-trigger input of inverter 6; the input voltage must stay between 0 and VCC per the recommended operating conditions. |
| 14 | VCC | power_in | Positive supply with a recommended operating range of 2 V to 6 V and an absolute maximum of 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage | VCC | 6.5 | V | 3 | |||
| Input/output voltage | VIN, VOUT | -0.3 | V | 3 | |||
| Output current | IOUT | -25 | 25 | mA | 3 | ||
| VCC or GND current | ICC | -50 | 50 | mA | 3 | ||
| Power dissipation | PD | 500 | mW | 3 | |||
| Operating temperature | TA | -40 | 85 | ℃ | 3 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 3 | ||
| Lead soldering temperature | TL | 260 | ℃ | 10 s | 3 | ||
| Operating voltage | VCC | 2 | 5 | 6 | V | 3 | |
| Input/output voltage | VIN, VOUT | 0 | V | 3 | |||
| Operating temperature | TA | -40 | 85 | ℃ | 3 | ||
| High-level output voltage | VOH | 1.9 | 1.99 | V | VI=VT-min, /IOUT/≤20μA, VCC=2.0V | 4 | |
| High-level output voltage | VOH | 4.4 | 4.49 | V | VI=VT-min, /IOUT/≤20μA, VCC=4.5V | 4 | |
| High-level output voltage | VOH | 5.9 | 5.99 | V | VI=VT-min, /IOUT/≤20μA, VCC=6.0V | 4 | |
| High-level output voltage | VOH | 3.7 | 4.3 | V | VI=VT-min, /IOUT/≤4.0mA, VCC=4.5V | 4 | |
| High-level output voltage | VOH | 5.2 | 5.8 | V | VI=VT-min, /IOUT/≤5.2mA, VCC=6.0V | 4 | |
| Low-level output voltage | VOL | 0.01 | 0.1 | V | VI=VT+max, /IOUT/≤20μA, VCC=2.0V | 4 | |
| Low-level output voltage | VOL | 0.1 | 0.25 | V | VI=VT+max, /IOUT/≤4.0mA, VCC=4.5V | 4 | |
| Input current | IIN | 0.01 | 1 | uA | VI=VCC or GND, VCC=6.0V | 4 | |
| Operating current | ICC | 0.5 | 20 | uA | VI=VCC or GND, IOUT=0μA, VCC=6.0V | 4 | |
| Propagation delay A to Y (high-to-low) | tPHL | 25 | ns | CL=47pF, VCC=5.0V, tr=tf≤20ns | 4 | ||
| Propagation delay A to Y (low-to-high) | tPLH | 30 | ns | CL=47pF, VCC=5.0V, tr=tf≤20ns | 4 | ||
| Output rise time | tTLH | 25 | ns | CL=47pF, VCC=5.0V, tr=tf≤20ns | 4 | ||
| Output fall time | tTHL | 25 | ns | CL=47pF, VCC=5.0V, tr=tf≤20ns | 4 |
CAD (KiCad official)
- Symbol:
74HC14DMT - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc14dmt-etched.step/74hc14dmt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc14dmt.step/74hc14dmt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (9 pp, sha256
1b579cf9c40cda11, retrieved 2026-10-28, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).