TPT3232E-SO3R from 3PEAK, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	C1+	passive	Positive lead of the C1 charge-pump flying capacitor. Connect the recommended 0.1-0.2 μF ceramic capacitor between C1+ and C1-.
2	V+	power_out	Positive charge-pump output (approx. +2×VCC). Connect a 0.1-0.2 μF storage capacitor from V+ to GND; this pin is for the storage capacitor only.
3	C1-	passive	Negative lead of the C1 charge-pump flying capacitor.
4	C2+	passive	Positive lead of the C2 charge-pump flying capacitor. Connect the recommended 0.1-0.2 μF ceramic capacitor between C2+ and C2-.
5	C2-	passive	Negative lead of the C2 charge-pump flying capacitor.
6	V-	power_out	Negative charge-pump output (approx. -2×VCC). Connect a 0.1-0.2 μF storage capacitor from V- to GND; this pin is for the storage capacitor only.
7	TOUT2	output	Driver 2 RS-232-level output. Typical output swing ±5.0 to ±5.4 V into a 3 kΩ load. ESD-protected to ±15 kV HBM.
8	RIN2	input	Receiver 2 RS-232-level input. Accepts ±15 V; typical threshold 1.25 V with 0.3 V hysteresis; internal 5 kΩ input resistance. ESD-protected to ±15 kV HBM.
9	ROUT2	output	Receiver 2 TTL/CMOS-level output. VOH ≥ VCC-0.3 V at 1.5 mA source, VOL ≤ 0.3 V at 1.5 mA sink.
10	TIN2	input	Driver 2 TTL/CMOS-level input. VIL ≤ 0.8 V; VIH ≥ 2.0 V at VCC = 3.3 V or ≥ 2.4 V at VCC = 5.0 V.
11	TIN1	input	Driver 1 TTL/CMOS-level input. VIL ≤ 0.8 V; VIH ≥ 2.0 V at VCC = 3.3 V or ≥ 2.4 V at VCC = 5.0 V.
12	ROUT1	output	Receiver 1 TTL/CMOS-level output. VOH ≥ VCC-0.3 V at 1.5 mA source, VOL ≤ 0.3 V at 1.5 mA sink.
13	RIN1	input	Receiver 1 RS-232-level input. Accepts ±15 V; typical threshold 1.25 V with 0.3 V hysteresis; internal 5 kΩ input resistance. ESD-protected to ±15 kV HBM.
14	TOUT1	output	Driver 1 RS-232-level output. Typical output swing ±5.0 to ±5.4 V into a 3 kΩ load. ESD-protected to ±15 kV HBM.
15	GND	power_in	Ground reference for the device.
16	VCC	power_in	Supply voltage input, 3.0 V to 5.5 V. Bypass with a 0.1 μF ceramic capacitor to GND placed close to the pin.

Key specifications

Parameter	Value
Manufacturer	3PEAK
Package	SOP-16
Category	Comm/UART
Pins	16

Ordering variants

Same part, different packaging or reel option.

TPT3232E-SO3R
TPT3232E-SO3RSS3R
TPT3232E-SO3RTS3R

CAD (KiCad official)

Symbol: TPT3232E-SO3R
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tpt3232e-so3r.step`	217 KB	You want the bare part, or you mark your own boards.
`tpt3232e-so3r-etched.step`	3.2 MB	You want the part with `TPT3232E-SO3R` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 765 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: 3PEAK datasheet (10 pp, sha256 b5563e7757b5cb9d, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF