component

TPS54527DDAR

Public Unreviewed

by Ray

Texas Instruments DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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TPS54527DDAR

Texas Instruments · DC-DC Converters · SOIC-8-EP

TPS54527DDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable input control. Active-high; must be pulled up to enable the device. VENH ≥ 1.6 V (high), VENL ≤ 0.6 V (low). Absolute max 20 V.
2 VFB input Converter feedback input. Connect to output voltage via a feedback resistor divider. Internal reference threshold ≈ 765 mV.
3 VREG5 power_out 5.5-V internal LDO power supply output. Requires a bypass capacitor (typically 1 µF) to GND. Not active when EN is low. Sourcing up to ~60 mA (5 mA recommended external load).
4 SS input Soft-start control. Connect an external capacitor to GND to program soft-start time. Charge current ≈ 6 µA.
5 GND power_in Ground pin. Power ground return for the switching circuit. Connect sensitive SS and VFB returns to GND at a single point.
6 SW output Switch node connection between the internal high-side and low-side NFETs. Connect to the output inductor. Rated up to 18 V (21 V transient).
7 VBST power_in Bootstrap supply for the high-side FET gate drive. Connect a 0.1-µF capacitor between VBST and SW. An internal diode is connected between VREG5 and VBST.
8 VIN power_in Input voltage supply pin. Operating range 4.5 V to 18 V (absolute max 20 V).
9 PAD passive Exposed thermal pad on backside of the package. Must be soldered to the PCB to achieve appropriate dissipation and must be connected to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • TPS54527DDAR

CAD (KiCad official)

  • Symbol: TPS54527DDAR
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps54527ddar.step 125 KB You want the bare part, or you mark your own boards.
tps54527ddar-etched.step 2.3 MB You want the part with TPS54527DDAR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 578 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 c50eacf6befabbea, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF