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CD74HC237M96
Public Made by Adomby adom
Texas Instruments Signal Switches / Encoders & Decoders / Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74HC237M96
Texas Instruments · Signal Switches / Encoders & Decoders / Multiplexers · SOIC-16
CD74HC237M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Binary select input A0 (least significant bit) that chooses one of eight outputs and is latched when LE is High. |
| 2 | A1 | input | Binary select input A1 that chooses one of eight outputs and is latched when LE is High. |
| 3 | A2 | input | Binary select input A2 (most significant bit) that chooses one of eight outputs and is latched when LE is High. |
| 4 | LE | input | Active-High latch enable; when High it latches the select inputs, and when Low the circuit acts as a transparent one-of-eight decoder. |
| 5 | OE1 | input | Output enable input that is used with OE0 to simplify cascading and to allow demultiplexing of the outputs. |
| 6 | OE0 | input | Output enable input that is used with OE1 to simplify cascading and to allow demultiplexing of the outputs. |
| 7 | Y7 | output | Decoder output 7, which goes High when selected on the HC237 (active-High output per the truth table). |
| 8 | GND | power_in | Ground reference for the device (0 V). |
| 9 | Y6 | output | Decoder output 6, which goes High when selected on the HC237 (active-High output per the truth table). |
| 10 | Y5 | output | Decoder output 5, which goes High when selected on the HC237 (active-High output per the truth table). |
| 11 | Y4 | output | Decoder output 4, which goes High when selected on the HC237 (active-High output per the truth table). |
| 12 | Y3 | output | Decoder output 3, which goes High when selected on the HC237 (active-High output per the truth table). |
| 13 | Y2 | output | Decoder output 2, which goes High when selected on the HC237 (active-High output per the truth table). |
| 14 | Y1 | output | Decoder output 1, which goes High when selected on the HC237 (active-High output per the truth table). |
| 15 | Y0 | output | Decoder output 0, which goes High when selected on the HC237 (active-High output per the truth table). |
| 16 | VCC | power_in | Positive supply; the HC types operate from 2V to 6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range, HC types | VCC | 2 | 6 | V | HC types | 4 | |
| Temperature range | TA | -55 | 125 | °C | 4 | ||
| Input rise and fall time | 1000 | ns | VCC=2V | 4 | |||
| Input rise and fall time | 500 | ns | VCC=4.5V | 4 | |||
| Input rise and fall time | 400 | ns | VCC=6V | 4 | |||
| DC supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| DC input diode current | IIK | -20 | 20 | mA | For VI < -0.5V or VI > VCC + 0.5V | 4 | |
| DC output diode current | IOK | -20 | 20 | mA | For VO < -0.5V or VO > VCC + 0.5V | 4 | |
| DC output source or sink current per output pin | IO | -25 | 25 | mA | For VO > -0.5V or VO < VCC + 0.5V | 4 | |
| DC VCC or ground current | ICC | -50 | 50 | mA | 4 | ||
| Maximum junction temperature | 150 | °C | 4 | ||||
| Maximum storage temperature range | -65 | 150 | °C | 4 | |||
| Maximum lead temperature (soldering) | 300 | °C | 10s (SOIC - Lead Tips Only) | 4 | |||
| High level input voltage | VIH | 1.5 | V | VCC=2V | 4 | ||
| High level input voltage | VIH | 3.15 | V | VCC=4.5V | 4 | ||
| High level input voltage | VIH | 4.2 | V | VCC=6V | 4 | ||
| Low level input voltage | VIL | 0.5 | V | VCC=2V | 4 | ||
| Low level input voltage | VIL | 1.35 | V | VCC=4.5V | 4 | ||
| Low level input voltage | VIL | 1.8 | V | VCC=6V | 4 | ||
| High level output voltage, CMOS loads | VOH | 1.9 | V | VI=VIH or VIL, IO=-0.02mA, VCC=2V | 4 | ||
| High level output voltage, CMOS loads | VOH | 4.4 | V | VI=VIH or VIL, IO=-0.02mA, VCC=4.5V | 4 | ||
| High level output voltage, CMOS loads | VOH | 5.9 | V | VI=VIH or VIL, IO=-0.02mA, VCC=6V | 4 | ||
| High level output voltage, TTL loads | VOH | 3.7 | V | IO=-4mA, VCC=4.5V | 4 | ||
| High level output voltage, TTL loads | VOH | 5.2 | V | IO=-5.2mA, VCC=6V | 4 | ||
| Low level output voltage, CMOS loads | VOL | 0.1 | V | VI=VIH or VIL, IO=0.02mA, VCC=2V | 4 | ||
| Low level output voltage, TTL loads | VOL | 0.4 | V | IO=4mA, VCC=4.5V | 4 | ||
| Input leakage current | II | -1 | 1 | µA | VI=VCC or GND, VCC=6V | 4 | |
| Quiescent device current | ICC | 160 | µA | VI=VCC or GND, IO=0, VCC=6V | 4 | ||
| An to LE setup time | tSU | 75 | ns | VCC=2V | 5 | ||
| An to LE setup time | tSU | 15 | ns | VCC=4.5V | 5 | ||
| An to LE setup time | tSU | 13 | ns | VCC=6V | 5 | ||
| An to LE hold time | tH | 45 | ns | VCC=2V | 5 | ||
| An to LE hold time | tH | 9 | ns | VCC=4.5V | 5 | ||
| An to LE hold time | tH | 8 | ns | VCC=6V | 5 | ||
| LE pulse width | tW | 75 | ns | VCC=2V | 5 | ||
| LE pulse width | tW | 15 | ns | VCC=4.5V | 5 | ||
| LE pulse width | tW | 13 | ns | VCC=6V | 5 | ||
| Propagation delay An to any Y (’HC237) | tPLH, tPHL | 240 | ns | CL=50pF, tr,tf=6ns, VCC=2V | 6 | ||
| Propagation delay An to any Y (’HC237) | tPLH, tPHL | 48 | ns | CL=50pF, tr,tf=6ns, VCC=4.5V | 6 | ||
| Propagation delay An to any Y (’HC237) | tPLH, tPHL | 41 | ns | CL=50pF, tr,tf=6ns, VCC=6V | 6 | ||
| OE0 to any Y | tPLH, tPHL | 220 | ns | CL=50pF, VCC=2V | 6 | ||
| OE0 to any Y | tPLH, tPHL | 44 | ns | CL=50pF, VCC=4.5V | 6 | ||
| OE0 to any Y | tPLH, tPHL | 38 | ns | CL=50pF, VCC=6V | 6 | ||
| OE1 to any Y | tTLH, tTHL | 220 | ns | CL=50pF, VCC=2V | 6 | ||
| OE1 to any Y | tTLH, tTHL | 44 | ns | CL=50pF, VCC=4.5V | 6 | ||
| OE1 to any Y | tTLH, tTHL | 38 | ns | CL=50pF, VCC=6V | 6 | ||
| LE to any Y | tTLH, tTHL | 285 | ns | CL=50pF, VCC=2V | 6 | ||
| LE to any Y | tTLH, tTHL | 57 | ns | CL=50pF, VCC=4.5V | 6 | ||
| LE to any Y | tTLH, tTHL | 48 | ns | CL=50pF, VCC=6V | 6 | ||
| Output transition time | tTLH, tTHL | 110 | ns | CL=50pF, VCC=2V | 6 | ||
| Output transition time | tTLH, tTHL | 22 | ns | CL=50pF, VCC=4.5V | 6 | ||
| Output transition time | tTLH, tTHL | 19 | ns | CL=50pF, VCC=6V | 6 | ||
| Input capacitance | CI | 10 | pF | 6 | |||
| Power dissipation capacitance (’HC237) | CPD | 23 | pF | CL=15pF, VCC=5V | 6 | ||
| Address to output (’HC237) | tPLH, tPHL | 13 | ns | CL=15pF, VCC=5V | 6 |
CAD (KiCad official)
- Symbol:
CD74HC237M96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd74hc237m96-etched.step/cd74hc237m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hc237m96.step/cd74hc237m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
2730bb722c30014a, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).