component
AT24C128N
Public Made by Adomby adom
HGSEMI EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAT24C128N
HGSEMI · EEPROM · DIP-8
AT24C128N from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Device address input that must match the device address bit E0 on the bus; if left floating it is internally biased to logic low (Vss). |
| 2 | E1 | input | Device address input that must match the device address bit E1 on the bus; if left floating it is internally pulled down to Vss. |
| 3 | E2 | input | Device address input that must match the device address bit E2 on the bus, allowing up to 8 devices on one bus; if left floating it is internally pulled down to Vss. |
| 4 | Vss | power_in | Ground, the reference for the VCC supply voltage. |
| 5 | SDA | bidirectional | Open-drain serial data input and output that may be wire-OR'ed with other open-drain or open-collector devices. |
| 6 | SCL | input | Serial clock input; data is clocked in on the positive edge and clocked out on the negative edge of SCL. |
| 7 | WCB | input | Active-low write control: when connected to VCC all write operations are inhibited, when connected to Vss normal writes are allowed, and it is internally pulled down to Vss if left floating. |
| 8 | VCC | power_in | Supply voltage, specified from 1.7 V to 5.5 V in the DC characteristics. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 1.7 | 5.5 | V | 4 | ||
| Standby Current | Isb | 1 | µA | Vcc = 3.3V, TA = 85°C | 4 | ||
| Standby Current | Isb | 2 | µA | Vcc = 5.5V, TA = 85°C | 4 | ||
| Standby Current | Isb | 3 | µA | Vcc = 5.5V, TA = 105°C | 4 | ||
| Supply Current (read) | ICC1 | 0.2 | 0.4 | mA | Vcc = 5.5V, Read at 400Khz | 4 | |
| Supply Current (write) | ICC2 | 0.8 | 1.6 | mA | Vcc = 5.5V, Write at 400Khz | 4 | |
| Input Leakage Current | ILI | 0.1 | 1 | µA | VIN = VCC or Vss | 4 | |
| Output Leakage Current | ILO | 0.05 | 1 | µA | VOUT = VCC or Vss | 4 | |
| Input Low Level | VIL | -0.5 | 0.3 | V (max in ×VCC) | 4 | ||
| Input High Level | VIH | 0.7 | ×VCC | 4 | |||
| Output Low Level (VCC = 1.7V) | VOL1 | 0.2 | V | VCC = 1.7V (SDA), IOL = 0.15 mA | 4 | ||
| Output Low Level (VCC = 3.0V) | VOL2 | 0.4 | V | VCC = 3.0V (SDA), IOL = 2.1 mA | 4 | ||
| Input / Output Capacitance (SDA) | CI/O | 8 | pF | VI/O= Vss | 4 | ||
| Input Capacitance (E0, E1, E2, WCB, SCL) | CIN | 6 | pF | VIN= Vss | 4 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| Ambient operating temperature range | TA | -40 | 125 | °C | 4 | ||
| Supply Voltage (absolute) | VCC | -0.5 | 6.5 | V | 4 | ||
| Input or output range | VIO | -0.5 | 6.5 | V | 4 | ||
| DC output current | IOL | 5 | mA | SDA=0 | 4 | ||
| Lead Temperature | TL | 260 | °C | Soldering, 10 seconds | 4 | ||
| Clock Frequency, SCL | fSCL | 400 | kHz | 5 | |||
| Clock Pulse Width Low | tLOW | 1.3 | µs | 5 | |||
| Clock Pulse Width High | tHIGH | 0.6 | µs | 5 | |||
| Clock Low to Data Out Valid | tAA | 0.05 | 0.9 | µs | 5 | ||
| Noise Suppression Time | tI | 0.1 | µs | 5 | |||
| Bus free time before new transmission | tBUF | 1.3 | µs | 5 | |||
| START Hold Time | tHD.STA | 0.6 | µs | 5 | |||
| START Setup Time | tSU.STA | 0.6 | µs | 5 | |||
| Data In Hold Time | tHD.DAT | 0 | µs | 5 | |||
| Data In Setup Time | tSU.DAT | 0.1 | µs | 5 | |||
| Inputs Rise Time | tR | 0.3 | µs | 5 | |||
| Inputs Fall Time | tF | 0.3 | µs | 5 | |||
| STOP Setup Time | tSU.STO | 0.6 | µs | 5 | |||
| Data Out Hold Time | tDH | 0.05 | µs | 5 | |||
| WCB pin Setup Time | tSU.WCB | 1.2 | µs | 5 | |||
| WCB pin Hold Time | tHD.WCB | 1.2 | µs | 5 | |||
| Write Cycle Time | tWR | 5 | ms | 5 | |||
| VCC voltage needed to fall below VPWD for ensuring initialization | VPWD | 0.7 | V | 7 | |||
| Minimum duration for ensuring initialization (power-down) | tPWD | 300 | us | 7 | |||
| VCC(min.) to device operation | tVSL | 70 | us | 7 | |||
| VCC Rise Time | tVR | 1 | 500000 | us/V | 7 |
CAD (KiCad official)
- Symbol:
AT24C128N - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
at24c128n-etched.step/at24c128n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at24c128n.step/at24c128n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (19 pp, sha256
ade6fc1683c10678, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).