component
PL82051
Public Made by Adomby adom
POWLICON DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPL82051
POWLICON · DC-DC Converters · ESOP-8
PL82051 from POWLICON, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | passive | Bootstrap pin; connect a 0.1 µF or greater ceramic capacitor between BST and SW to power the high-side gate driver, with BST to SW absolute maximum of -0.3 to 6.5 V. |
| 2 | VIN | power_in | Power input supplying the IC, to be supplied from 4.6 V to 33 V and bypassed to GND with a large capacitor plus at least 0.1 µF ceramic placed close to VIN and GND (VIN to GND absolute maximum -0.3 to +40 V). |
| 3 | EN | input | Enable input that turns the regulator on when driven high and off when driven low, pulled up to VIN internally, with an internal threshold of 1.2 V and recommended voltage range 0 to 5 V. |
| 4 | NC | unconnected | No connect. |
| 5 | FB | input | Output voltage feedback input referenced to a 0.8 V typical internal reference (0.788 V to 0.812 V), with recommended voltage range 0 to 5 V. |
| 6 | CS | input | Current loop pin where a resistor sets the average load current limit (Iout = 45 mV/R, typical R 10 mΩ) and line drop compensation, with recommended voltage range 0 to 5 V. |
| 7 | GND | power_in | Ground pin for the device. |
| 8 | SW | output | Power switching pin connected to the inductor switching node, with SW to GND absolute maximum of -0.3 to +40 V and recommended range 0 to 33 V. |
| 9 | GND | power_in | Ground, listed by the datasheet as the second GND pin together with pin 7; the layout section refers to the GND pin and PAD, so this is likely the exposed thermal pad. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | POWLICON |
| Package | ESOP-8 |
| Category | Power Supply Chip |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN VIN to GND Voltage | VIN | -0.3 | 40 | V | 3 | ||
| BST to SW Voltage | BST | -0.3 | 6.5 | V | 3 | ||
| SW to GND Voltage | SW | -0.3 | 40 | V | 3 | ||
| EN, FB, CS Voltage | -0.3 | 6.5 | V | 3 | |||
| Storage Temperature Range | TST | -65 | 150 | °C | 3 | ||
| Junction Temperature | TJ | 150 | °C | 3 | |||
| Lead Temperature | TL | 260 | °C | 3 | |||
| HBM ESD (Human body model) | VESD | 2 | kV | 3 | |||
| VIN Voltage | VIN | 5 | 33 | V | 3 | ||
| SW Voltage | SW | 0 | 33 | V | 3 | ||
| BST Voltage | BST | 0 | V | 3 | |||
| EN Voltage | EN | 0 | 5 | V | 3 | ||
| FB Voltage | FB | 0 | 5 | V | 3 | ||
| CS Voltage | 0 | 5 | V | 3 | |||
| Operating Ambient Temperature Range | TA | -40 | 125 | °C | 3 | ||
| Buck input standoff voltage | VIN_max | 40 | V | 4 | |||
| Buck input voltage range | VIN | 4.6 | 33 | V | 4 | ||
| VIN UVLO voltage | VIN_UVLO | 4.6 | V | VIN rising | 4 | ||
| VIN UVLO voltage | VIN_UVLO | 4.1 | V | VIN falling | 4 | ||
| VIN over voltage | VIN_OVP | 33 | V | VIN rising | 4 | ||
| VIN over voltage | VIN_OVP | 30 | V | VIN falling | 4 | ||
| VIN Shutdown Current | IQ | 10 | uA | VEN = 0, VIN = 12V | 4 | ||
| Buck switching frequency range | Fbuck | 120 | 160 | 200 | kHz | 4 | |
| Frequency spread spectrum in percentage of Fbuck | fjitter | -6 | 6 | % | 4 | ||
| FB voltage | FB | 0.788 | 0.8 | 0.812 | V | 4 | |
| Maximum Duty Cycle | Dmax | 98 | % | 4 | |||
| Minimum On Time | Ton | 100 | ns | 4 | |||
| Peak inductor current limit | ILIMIT | 6.5 | A | 4 | |||
| High-Side Switch On-Resistance | RDS(ON)_H | 80 | mΩ | 4 | |||
| Low-Side Switch On-Resistance | RDS(ON)_L | 50 | mΩ | 4 | |||
| Thermal Shutdown | Thsd | 160 | ℃ | 4 | |||
| Thermal Shutdown Hysteresis | Thsdhys | 60 | ℃ | 4 | |||
| Junction to ambient thermal resistance (ESOP8) | θJA | 56 | °C/W | 3 | |||
| Junction to case thermal resistance (ESOP8) | θJC | 45 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
PL82051 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
pl82051-etched.step/pl82051-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pl82051.step/pl82051.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: POWLICON datasheet (13 pp, sha256
c3b397f2f9a98a98, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).