component
24LC512-I
Public Made by Adomby adom
Tudi EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown24LC512-I
Tudi · EEPROM · DIP-8
24LC512-I from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input used for hardware addressing; left floating, it defaults to zero, and up to 8 devices can share one bus. |
| 2 | A1 | input | Device address input used for hardware addressing; left floating, it defaults to zero, and up to 8 devices can share one bus. |
| 3 | A2 | input | Device address input used for hardware addressing; left floating, it defaults to zero, and up to 8 devices can share one bus. |
| 4 | GND | power_in | Ground of the supply voltage. |
| 5 | SDA | bidirectional | Bidirectional serial address and data pin; it is an open-drain output that requires a pull-up resistor connected to the power supply. |
| 6 | SCL | input | Serial clock input that synchronizes data transfer to and from the device. |
| 7 | WP | input | Write protect input: when tied to the supply the entire array is write protected (read only), and when tied to ground or left floating normal write operations are allowed. |
| 8 | VCC | power_in | Power supply pin; the operating range is 1.7V to 5.5V over the industrial temperature range of -40°C to +85°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient Temperature (Industrial) | TA | -40 | 85 | °C | Industrial (I) range | 10 | |
| Supply Voltage (24LC512 range) | VCC | 2.5 | 5.5 | V | 24LC512 VCC range per device selection table | 1 | |
| Input Low Voltage | VIL | -1 | V | 11 | |||
| Input Leakage Current | ILI | 2 | µA | VCC = 5 V; VIN = VCC max | 11 | ||
| Output Leakage Current | ILO | 2 | µA | VCC = 5 V | 11 | ||
| Output Low Voltage | VOL2 | 0.4 | V | VCC = 3 V; IOL = 2.1 mA | 11 | ||
| Standby Current | ISB2 | 2 | µA | VCC = 2.5 V; VIN = VCC or GND | 11 | ||
| Standby Current | ISB3 | 3 | µA | VCC = 5 V; VIN = VCC or GND | 11 | ||
| Read Current | ICC1 | 1 | mA | VCC = 2.5 V; Read at 1 MHz | 11 | ||
| Write Current | ICC2 | 3 | mA | VCC = 2.5 V; Write at 1 MHz | 11 | ||
| Input Capacitance | CIN | 6 | pF | VIN = 0V | 10 | ||
| Input / Output Capacitance | CI/O | 8 | pF | VI/O = 0V | 10 | ||
| Supply Voltage | VS | -0.5 | 6.5 | V | 10 | ||
| Voltage on Any Pin | VP | -0.5 | V | 10 | |||
| Temperature Under Bias | TBIAS | -55 | 125 | °C | 10 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 10 | ||
| Output Current | IOUT | 5 | mA | 10 | |||
| SCK Clock Frequency | FSCL | 1000 | KHz | 2.5V≤VCC<4.5V | 12 | ||
| Clock Low Period | TLOW | 400 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Clock High Period | THIGH | 400 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Rise Time (SCL and SDA) | TR | 300 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Fall Time (SCL and SDA) | TF | 100 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Start Condition Setup Time | TSU:STA | 200 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Stop Condition Setup Time | TSU:STO | 200 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Start Condition Hold Time | THD:STA | 200 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Data In Setup Time | TSU:DAT | 40 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Data In Hold Time | THD:DAT | 0 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Clock to Output Access Time (SCL Low to SDA Data Out Valid) | TAA | 50 | 400 | ns | 2.5V≤VCC<4.5V | 12 | |
| Data Out Hold Time (SCL Low to SDA Data Out Change) | TDH | 50 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Write Cycle Time | TWR | 5 | ms | 2.5V≤VCC<4.5V | 12 | ||
| Bus Free Time Before New Transmission | TBUF | 400 | ns | 2.5V≤VCC<4.5V | 12 | ||
| WP Pin Setup Time | TSU:WP | 400 | ns | 2.5V≤VCC<4.5V | 12 | ||
| WP Pin Hold Time | THD:WP | 1200 | ns | 2.5V≤VCC<4.5V | 12 | ||
| Noise Suppression Time | T | 50 | ns | 2.5V≤VCC<4.5V | 12 |
CAD (KiCad official)
- Symbol:
24LC512-I - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
24lc512-i-etched.step/24lc512-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);24lc512-i.step/24lc512-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (15 pp, sha256
74e008b3faf14523, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).