Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SI4162DY-T1-GE3

Vishay Intertech · MOSFETs · SO-8

SI4162DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.
2 S passive Source terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.
3 S passive Source terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.
4 G input Gate terminal of the N-channel MOSFET; gate-source voltage is limited to ±20 V per the absolute maximum ratings.
5 D passive Drain terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.
6 D passive Drain terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.
7 D passive Drain terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.
8 D passive Drain terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 19.3 A TJ = 150 °C; TC = 25 °C 1
Continuous Drain Current ID 15.4 A TJ = 150 °C; TC = 70 °C 1
Continuous Drain Current ID 13.6 A TA = 25 °C (notes b, c) 1
Continuous Drain Current ID 10.9 A TA = 70 °C (notes b, c) 1
Pulsed Drain Current IDM 70 A 1
Avalanche Current IAS 31 A L = 0.1 mH 1
Avalanche Energy EAS 48 mJ 1
Continuous Source-Drain Diode Current IS 4.2 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS 2.1 A TA = 25 °C (notes b, c) 1
Maximum Power Dissipation PD 5 W TC = 25 °C 1
Maximum Power Dissipation PD 3.2 W TC = 70 °C 1
Maximum Power Dissipation PD 2.5 W TA = 25 °C (notes b, c) 1
Maximum Power Dissipation PD 1.6 W TA = 70 °C (notes b, c) 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 38 50 °C/W t ≤ 10 s (notes b, d) 1
Maximum Junction-to-Ambient, steady state RthJA 85 °C/W Steady State (note d) 1
Maximum Junction-to-Case (Drain) RthJC 20 25 °C/W Steady State 1
Drain-Source Breakdown Voltage VDS 30 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 1 3 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 5 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 50 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.0065 0.0079 Ω VGS = 10 V, ID = 20 A 2
Drain-Source On-State Resistance RDS(on) 0.0082 0.01 Ω VGS = 4.5 V, ID = 14 A 2
Total Gate Charge Qg 20 30 nC VDS = 15 V, VGS = 10 V, ID = 20 A 2
Total Gate Charge Qg 8.8 14 nC VDS = 15 V, VGS = 4.5 V, ID = 20 A 2
Gate Resistance Rg 1 2 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 20 30 ns VDD = 15 V, RL = 15 Ω, ID ≅ 1.0 A, VGEN = 4.5 V, Rg = 17 Ω 2
Rise Time tr 15 25 ns 2
Turn-Off Delay Time td(off) 25 40 ns 2
Fall Time tf 10 15 ns 2
Turn-On Delay Time td(on) 14 20 ns VDD = 15 V, RL = 15 Ω, ID ≅ 1.0 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 9 15 ns 2
Fall Time tf 9 15 ns 2
Continuous Source-Drain Diode Current IS 30 A TC = 25 °C 2
Pulse Diode Forward Current ISM 70 A 2
Body Diode Voltage VSD 0.8 1.2 V IS = 4.0 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 21 42 ns IF = 4.0 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 15 30 nC 2

CAD (KiCad official)

  • Symbol: SI4162DY-T1-GE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4162dy-t1-ge3-etched.step / si4162dy-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4162dy-t1-ge3.step / si4162dy-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 c31497d5454b83ab, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF