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LT3045IMSE#TRPBF
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Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-12-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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README
markdownLT3045IMSE#TRPBF
Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-12-EP
LT3045IMSE#TRPBF from Analog Devices, in a MSOP-12-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply pin that requires a bypass capacitor (minimum 4.7µF, low-ESR ceramic recommended), with an input voltage range of 2V to 20V and a ±22V absolute maximum rating. |
| 2 | IN | power_in | Input supply pin that must be connected in parallel with pin 1 and bypassed with at least 4.7µF, with an input voltage range of 2V to 20V and a ±22V absolute maximum rating. |
| 3 | IN | power_in | Input supply pin that must be connected in parallel with pins 1 and 2 and bypassed with at least 4.7µF, with an input voltage range of 2V to 20V and a ±22V absolute maximum rating. |
| 4 | EN/UV | input | Enable and undervoltage-lockout pin that shuts the part down when pulled low (quiescent current below 1µA), has a 1.24V rising threshold with 130mV hysteresis, must not be floated (tie to IN if unused), and is rated ±22V. |
| 5 | PG | output | Open-collector power-good flag that pulls low when PGFB is below 300mV, may be floated if unused, and must not be driven more than 0.3V below GND. |
| 6 | ILIM | passive | Current-limit programming pin where a resistor to GND sets the limit at 150mA·kΩ/RILIM and which doubles as a 1:500 current monitor with a 0V to 300mV range; tie to GND if unused and do not drive more than 0.3V below GND. |
| 7 | PGFB | input | Power-good feedback input where PG releases high when PGFB rises above 300mV (7mV falling-edge hysteresis), must be tied to IN if power-good and fast start-up are not used, and must not be driven more than 0.3V below GND. |
| 8 | SET | passive | Error-amplifier inverting input and regulation set point that sources a precision 100µA through RSET to give VOUT = ISET·RSET over 0V to 15V, with SET rated 16V maximum and ±20mA maximum pin current. |
| 9 | GND | power_in | Ground pin that must be tied directly to the exposed pad and the PCB ground for proper electrical and thermal performance. |
| 10 | OUTS | input | Output sense input to the non-inverting error-amplifier input that should be Kelvin-connected directly to the output capacitor and load, rated 16V maximum with ±20mA maximum pin current and not to be driven more than 0.3V below GND. |
| 11 | OUT | power_out | Regulator output pin that supplies the load and requires a minimum 10µF ceramic output capacitor with ESR below 20mΩ and ESL below 2nH, with a 16V maximum pin voltage. |
| 12 | OUT | power_out | Regulator output pin that supplies the load and must be connected in parallel with pin 11, with a 16V maximum pin voltage and a minimum 10µF ceramic output capacitor with ESR below 20mΩ and ESL below 2nH. |
| 13 | GND | power_in | Exposed backside pad that is the electrical GND connection and must be soldered to the PCB ground and tied directly to the GND pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-12-EP |
| Category | Power Management (PMIC) |
| Pins | 13 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN Pin Voltage | VIN | -22 | 22 | V | 2 | ||
| EN/UV Pin Voltage | VEN/UV | -22 | 22 | V | 2 | ||
| IN-to-EN/UV Differential | -22 | 22 | V | 2 | |||
| PG Pin Voltage (Note 10) | VPG | -0.3 | 22 | V | 2 | ||
| ILIM Pin Voltage (Note 10) | VILIM | -0.3 | 1 | V | 2 | ||
| PGFB Pin Voltage (Note 10) | VPGFB | -0.3 | 22 | V | 2 | ||
| SET Pin Voltage (Note 10) | VSET | -0.3 | 16 | V | 2 | ||
| SET Pin Current (Note 7) | ISET | -20 | 20 | mA | 2 | ||
| OUTS Pin Voltage (Note 10) | VOUTS | -0.3 | 16 | V | 2 | ||
| OUTS Pin Current (Note 7) | IOUTS | -20 | 20 | mA | 2 | ||
| OUT Pin Voltage (Note 10) | VOUT | -0.3 | 16 | V | 2 | ||
| OUT-to-OUTS Differential (Note 14) | -1.2 | 1.2 | V | 2 | |||
| IN-to-OUT Differential | -22 | 22 | V | 2 | |||
| IN-to-OUTS Differential | -22 | 22 | V | 2 | |||
| Operating Junction Temperature Range (Note 9) | TJ | -40 | 125 | °C | E-Grade, I-Grade | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature (Soldering, 10 Sec) | 300 | °C | 10 Sec, MSE Package | 2 | |||
| Input Voltage Range | VIN | 2 | 20 | V | 3 | ||
| Minimum IN Pin Voltage (Note 2) | 1.78 | 2 | V | ILOAD = 500mA, VIN UVLO Rising | 3 | ||
| Output Voltage Range | VOUT | 0 | 15 | V | VIN > VOUT | 3 | |
| SET Pin Current (ISET) | ISET | 99 | 100 | 101 | µA | VIN = 2V, ILOAD = 1mA, VOUT = 1.3V | 3 |
| SET Pin Current (ISET) | ISET | 98 | 100 | 102 | µA | 2V < VIN < 20V, 0V < VOUT < 15V, 1mA < ILOAD < 500mA (Note 3) | 3 |
| Output Offset Voltage VOS (VOUT, VSET) (Note 4) | VOS | -1 | 1 | mV | VIN = 2V, ILOAD = 1mA, VOUT = 1.3V | 3 | |
| Output Offset Voltage VOS (VOUT, VSET) (Note 4) | VOS | -2 | 2 | mV | 2V < VIN < 20V, 0V < VOUT < 15V, 1mA < ILOAD < 500mA (Note 3) | 3 | |
| Line Regulation: ΔISET | ΔISET | -2 | 0.5 | 2 | nA/V | VIN = 2V to 20V, ILOAD = 1mA, VOUT = 1.3V | 3 |
| Line Regulation: ΔVOS | ΔVOS | -3 | 0.5 | 3 | µV/V | VIN = 2V to 20V, ILOAD = 1mA, VOUT = 1.3V (Note 4) | 3 |
| Load Regulation: ΔVOS | ΔVOS | 0.1 | 0.5 | mV | ILOAD = 1mA to 500mA, VIN = 2V, VOUT = 1.3V (Note 4) | 3 | |
| Change in ISET with VSET | ISET | 30 | 400 | nA | VSET = 1.3V to 15V, VIN = 20V, ILOAD = 1mA | 3 | |
| Change in VOS with VSET | VOS | 0.03 | 0.6 | mV | VSET = 1.3V to 15V, VIN = 20V, ILOAD = 1mA (Note 4) | 3 | |
| Change in ISET with VSET | ISET | 150 | 600 | nA | VSET = 0V to 1.3V, VIN = 20V, ILOAD = 1mA | 3 | |
| Change in VOS with VSET | VOS | 0.3 | 2 | mV | VSET = 0V to 1.3V, VIN = 20V, ILOAD = 1mA (Note 4) | 3 | |
| Dropout Voltage (25°C limit) | VDO | 220 | 275 | mV | ILOAD = 1mA, 50mA | 3 | |
| Dropout Voltage (full temperature range limit) | VDO | 220 | 330 | mV | ILOAD = 1mA, 50mA | 3 | |
| Dropout Voltage (25°C limit) | VDO | 220 | 280 | mV | ILOAD = 300mA (Note 5) | 3 | |
| Dropout Voltage (full temperature range limit) | VDO | 220 | 350 | mV | ILOAD = 300mA (Note 5) | 3 | |
| Dropout Voltage (25°C limit) | VDO | 260 | 350 | mV | ILOAD = 500mA (Note 5) | 3 | |
| Dropout Voltage (full temperature range limit) | VDO | 260 | 450 | mV | ILOAD = 500mA (Note 5) | 3 | |
| GND Pin Current (Note 6) | IGND | 2.2 | 4 | mA | VIN = VOUT(NOMINAL), ILOAD = 10µA | 3 | |
| GND Pin Current (Note 6) | IGND | 2.4 | 5.5 | mA | VIN = VOUT(NOMINAL), ILOAD = 1mA | 3 | |
| GND Pin Current (Note 6) | IGND | 3.5 | 7 | mA | VIN = VOUT(NOMINAL), ILOAD = 50mA | 3 | |
| GND Pin Current (Note 6) | IGND | 15 | 25 | mA | VIN = VOUT(NOMINAL), ILOAD = 500mA | 3 | |
| EN/UV Trip Point Rising (Turn-On) | 1.18 | 1.24 | 1.32 | V | VIN = 2V | 3 | |
| EN/UV Pin Current | IEN/UV | -1 | 0.03 | 1 | µA | VEN/UV = 0V, VIN = 20V | 4 |
| EN/UV Pin Current | IEN/UV | 8 | 15 | µA | VEN/UV = 1.24V, VIN = 20V | 4 | |
| Quiescent Current in Shutdown | IQ | 0.3 | 1 | µA | VEN/UV = 0V, VIN = 6V, TJ ≤ 125°C (E/I-Grade) | 4 | |
| Programmable Current Limit | ILIM | 450 | 500 | 550 | mA | VIN = 2V, VOUT = 0V, RILIM = 300Ω | 4 |
| Programmable Current Limit | ILIM | 90 | 100 | 110 | mA | VIN = 2V, VOUT = 0V, RILIM = 1.5kΩ | 4 |
| PGFB Trip Point Rising | VPGFB | 291 | 300 | 309 | mV | PGFB Trip Point Rising | 4 |
| PG Output Low Voltage | VPG | 30 | 100 | mV | IPG = 100µA | 4 | |
| PG Leakage Current | IPG | 1 | µA | VPG = 20V | 4 | ||
| Reverse Input Current | IIN | 100 | µA | VIN = -20V, VEN/UV = 0V, VOUT = 0V, VSET = 0V | 4 | ||
| Reverse Output Current | IOUT | 14 | 25 | µA | VIN = 0, VOUT = 5V, SET = Open | 4 | |
| Minimum Load Required (Note 13) | 10 | µA | VOUT < 1V | 4 | |||
| Thermal Resistance Junction-to-Ambient (MSE package) | θJA | 33 | °C/W | MSE package, TJMAX = 150°C | 2 | ||
| Thermal Resistance Junction-to-Case (MSE package) | θJC | 8 | °C/W | MSE package, TJMAX = 150°C | 2 |
CAD (KiCad official)
- Symbol:
LT3045IMSE#TRPBF - Footprint:
Package_SO:MSOP-12-1EP_3x4.039mm_P0.65mm_EP1.651x2.845mm - 3D model: MSOP-12-EP (KiCad packages3D, STEP)
- 3D model files:
lt3045imse-trpbf-etched.step/lt3045imse-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3045imse-trpbf.step/lt3045imse-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (32 pp, sha256
79a19c48f10093eb, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).