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Contents

README

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TLV803EA30DCKR

Texas Instruments · Supervisor And Reset ICs · SC-70-3

TLV803EA30DCKR from Texas Instruments, in a SC-70-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground return. Connect to the system ground plane; place bypass capacitor on VDD referenced to this pin.
2 RESET output Active-low, open-drain reset output (TLV803E variant). Driven low when VDD falls below the negative threshold VIT- (3.0 V nominal for the '30' option) and remains asserted for the delay time tD (200 ms typ, 'A' option) after VDD rises above VIT+. Requires an external pull-up resistor to VDD or another rail (RESET current ≤ ±5 mA recommended).
3 VDD power_in Input supply voltage and the monitored rail. Recommended operating range 1.7 V-6 V (absolute max 6.5 V). Bypass with a ceramic capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-3
Category Power Management (PMIC)
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • TLV803EA30DCKR
  • TLV803EA30DCKRDCKT
  • TLV803EA30DCKRDBZR
  • TLV803EA30DCKRDBZT
  • TLV803EA30DCKRDPWR

CAD (KiCad official)

  • Symbol: TLV803EA30DCKR
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SC-70-3 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 f243a4ad6345ae15, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF