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Contents

README

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CBM8656AMS8

Corebai Microelectronics · Precision OpAmps · MSOP-8

CBM8656AMS8 from Corebai Microelectronics, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Amplifier A output, rail-to-rail swing, output current ±220 mA at VS=5V and stable with capacitive loads up to 500 pF.
2 -IN A input Amplifier A inverting input, rail-to-rail with input voltage range 0 V to VS and input bias current of 1 pA typ.
3 +IN A input Amplifier A non-inverting input, rail-to-rail with input voltage range 0 V to VS and input bias current of 1 pA typ.
4 V- power_in Negative supply (ground in single-supply use); inputs should not go more than 0.3 V below it.
5 +IN B input Amplifier B non-inverting input, rail-to-rail with input voltage range 0 V to VS and input bias current of 1 pA typ.
6 -IN B input Amplifier B inverting input, rail-to-rail with input voltage range 0 V to VS and input bias current of 1 pA typ.
7 OUT B output Amplifier B output, rail-to-rail swing, output current ±220 mA at VS=5V and stable with capacitive loads up to 500 pF.
8 V+ power_in Positive supply for 2.7 V to 5.5 V operation (absolute maximum 6 V), bypassed with 0.1 µF close to the pin.

Key specifications

Parameter Value
Manufacturer Corebai Microelectronics
Package MSOP-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage VOS 50 250 µV VS=5.0V, VCM=0V to 5V 3
Offset Voltage (temp) VOS 550 µV VS=5.0V, -40°C≤TA≤+125°C 3
Offset Voltage Drift ΔVOS/ΔT 0.4 2.3 µV/℃ VS=5.0V, -40°C≤TA≤+125°C 3
Input Bias Current IB 1 10 pA VS=5.0V 3
Input Bias Current (temp) IB 500 pA VS=5.0V, -40°C≤TA≤+125°C 3
Input Offset Current IOS 10 pA VS=5.0V 3
Input Offset Current (temp) IOS 500 pA VS=5.0V, -40°C≤TA≤+125°C 3
Input Voltage Range 0 5 V VS=5.0V 3
Common-Mode Rejection Ratio CMRR 85 100 dB VS=5.0V, VCM=0V to 5V 3
Large Signal Voltage Gain AVO 100 110 dB VS=5.0V, VO=0.2V to 4.8V, RL=10kΩ, VCM=0V 3
Large Signal Voltage Gain (temp) AVO 95 dB VS=5.0V, -40°C≤TA≤+125°C 3
Output Voltage High VOH 4.97 4.991 V VS=5.0V, IL=1mA; -40℃≤TA≤+125℃ 3
Output Voltage Low VOL 8 30 mV VS=5.0V, IL=1mA; -40℃≤TA≤+125℃ 3
Output Current VOUT 220 mA VS=5.0V, VOUT=±0.5V (printed ±220) 3
Power Supply Rejection Ratio PSRR 88 105 dB VS=2.7V to 5.0V 3
Supply Current/Amplifier ISY 3.7 4.5 mA VS=5.0V, VO=0V 3
Supply Current/Amplifier (temp) ISY 5.3 mA VS=5.0V, -40℃≤TA≤+125℃ 3
Input Capacitance Differential CIN 9.3 pF Differential 3
Input Capacitance Common-Mode CIN 16.7 pF Common-Mode 3
Input Voltage Noise Density en 4 nV/√Hz VS=5.0V, f=1kHz 3
Input Voltage Noise Density en 2.7 nV/√Hz VS=5.0V, f=10kHz 3
Total Harmonic Distortion+Noise THD+N 0.0007 % G=1, RL=1kΩ, f=1kHz, VIN=2V p-p 3
Gain Bandwidth Product GBP 28 MHz VS=5.0V 4
Slew Rate SR 11 V/µs VS=5.0V, RL=10kΩ 4
Settling Time ts 370 ns To 0.1%, VIN=0V to 2V step, G=+1 4
Phase Margin 69 degrees VS=5.0V, CL=0pF 4
Offset Voltage VOS 44 250 µV VS=2.7V, VCM=0V to 2.7V 5
Offset Voltage (temp) VOS 550 µV VS=2.7V, -40℃≤TA≤+125℃ 5
Offset Voltage Drift ΔVOS/ΔT 0.4 2 µV/℃ VS=2.7V, -40℃≤TA≤+125℃ 5
Input Bias Current IB 1 10 pA VS=2.7V 5
Input Bias Current (temp) IB 500 pA VS=2.7V, -40℃≤TA≤+125℃ 5
Input Offset Current IOS 10 pA VS=2.7V 5
Input Offset Current (temp) IOS 500 pA VS=2.7V, -40℃≤TA≤+125℃ 5
Input Voltage Range 0 2.7 V VS=2.7V 5
Common-Mode Rejection Ratio CMRR 80 98 dB VS=2.7V, VCM=0V to 2.7V 5
Large Signal Voltage Gain AVO 98 dB VS=2.7V, VO=0.2V to 2.5V, RL=10kΩ, VCM=0V 5
Large Signal Voltage Gain (temp) AVO 90 dB VS=2.7V, -40℃≤TA≤+125℃ 5
Output Voltage High VOH 2.67 2.688 V VS=2.7V, IL=1mA; -40℃≤TA≤+125℃ 5
Output Voltage Low VOL 10 30 mV VS=2.7V, IL=1mA; -40℃≤TA≤+125℃ 5
Output Current VOUT 75 mV VS=2.7V, VOUT=±0.5V (printed ±75, unit printed mV) 5
Power Supply Rejection Ratio PSRR 88 105 dB VS=2.7V to 5.0V 5
Supply Current/Amplifier ISY 3.7 4.5 mA VS=2.7V, VO=0V 5
Supply Current/Amplifier (temp) ISY 5.3 mA VS=2.7V, -40℃≤TA≤+125℃ 5
Gain Bandwidth Product GBP 27 MHz VS=2.7V 5
Slew Rate SR 8.5 V/µs VS=2.7V, RL=10kΩ 5
Phase Margin 54 degrees VS=2.7V, CL=0pF 5
Supply Voltage 6 V 6
Differential Input Voltage -6 6 V ±6 V 6
Electrostatic Discharge (HBM) 3 kV HBM 6
Storage Temperature Range -65 150 ℃ R, RM Packages 6
Junction Temperature Range -65 150 ℃ R, RM Packages 6
Lead Temperature (Soldering) 260 ℃ Soldering, 10 sec 6
Thermal Resistance Junction-to-Ambient θJA 210 ℃/W 8-Lead MSOP (RM) 6
Thermal Resistance Junction-to-Case θJC 45 ℃/W 8-Lead MSOP (RM) 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Poor PC board layout, contaminants, and the board insulator material can create leakage 22

CAD (KiCad official)

  • Symbol: CBM8656AMS8
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cbm8656ams8-etched.step / cbm8656ams8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm8656ams8.step / cbm8656ams8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Corebai Microelectronics datasheet (25 pp, sha256 29c3f6721613b5a4, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF