component
DMP4025LSD-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMP4025LSD-13
Diodes Incorporated · MOSFETs · SO-8
DMP4025LSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of P-channel MOSFET 1; the datasheet gives no other limits for this pin beyond the -40V VDSS rating. |
| 2 | G1 | input | Gate of P-channel MOSFET 1, with a gate-source voltage rating of ±20V and a threshold of -0.8V to -1.8V. |
| 3 | S2 | passive | Source of P-channel MOSFET 2; the datasheet gives no other limits for this pin beyond the -40V VDSS rating. |
| 4 | G2 | input | Gate of P-channel MOSFET 2, with a gate-source voltage rating of ±20V and a threshold of -0.8V to -1.8V. |
| 5 | D2 | passive | Drain of P-channel MOSFET 2, connected to pin 6, with VDSS of -40V and continuous drain current of -7.6A. |
| 6 | D2 | passive | Drain of P-channel MOSFET 2, connected to pin 5, with VDSS of -40V and continuous drain current of -7.6A. |
| 7 | D1 | passive | Drain of P-channel MOSFET 1, connected to pin 8, with VDSS of -40V and continuous drain current of -7.6A. |
| 8 | D1 | passive | Drain of P-channel MOSFET 1, connected to pin 7, with VDSS of -40V and continuous drain current of -7.6A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -40 | V | ID = -250µA, VGS = 0V | 4 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -40V, VGS = 0V | 4 | ||
| Gate-Source Leakage | IGSS | 100 | nA | VGS = 20V, VDS = 0V | 4 | ||
| Gate Threshold Voltage | VGS(TH) | -0.8 | -1.3 | -1.8 | V | ID = -250µA, VDS = VGS | 4 |
| Static Drain-Source On-Resistance | RDS(ON) | 18 | 25 | mΩ | VGS = -10V, ID = -3A | 4 | |
| Static Drain-Source On-Resistance | RDS(ON) | 30 | 45 | mΩ | VGS = -4.5V, ID = -3A | 4 | |
| Diode Forward Voltage | VSD | -0.7 | -1 | V | IS = -1A, VGS = 0V | 4 | |
| Drain-Source Voltage | VDSS | -40 | V | 2 | |||
| Gate-Source Voltage | VGSS | 20 | V | 2 | |||
| Continuous Drain Current | ID | -7.6 | A | VGS = -10V (Notes 6 & 8) | 2 | ||
| Continuous Drain Current at TA = +70°C | ID | -6.1 | A | TA = +70°C (Notes 6 & 8) | 2 | ||
| Continuous Drain Current | ID | -5.8 | A | (Notes 5 & 8) | 2 | ||
| Continuous Drain Current | ID | -6.9 | A | (Notes 5 & 9) | 2 | ||
| Pulsed Drain Current | IDM | -28 | A | VGS = -10V (Notes 7 & 8) | 2 | ||
| Continuous Source Current (Body Diode) | IS | -7.6 | A | (Notes 6 & 8) | 2 | ||
| Pulsed Source Current (Body Diode) | ISM | -28 | A | (Notes 7 & 8) | 2 | ||
| Avalanche Current | IAS | -23 | A | L = 0.3mH (Note 11) | 2 | ||
| Avalanche Energy | EAS | 79 | mJ | L = 0.3mH (Note 11) | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Power Dissipation | PD | 2.14 | W | (Notes 6 & 8) | 2 | ||
| Power Dissipation | PD | 1.25 | W | (Notes 5 & 8) | 2 | ||
| Power Dissipation | PD | 1.8 | W | (Notes 5 & 9) | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 58 | °C/W | (Notes 6 & 8) | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 100 | °C/W | (Notes 5 & 8) | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 70 | °C/W | (Notes 5 & 9) | 2 | ||
| Thermal Resistance, Junction to Lead | RθJL | 51 | °C/W | (Notes 8 & 10) | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminals: Finish - Matte Tin Annealed over Copper Lead | 1 |
CAD (KiCad official)
- Symbol:
DMP4025LSD-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dmp4025lsd-13-etched.step/dmp4025lsd-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp4025lsd-13.step/dmp4025lsd-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (8 pp, sha256
3c4016787b16cf1e, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).