component
MC74LCX32DTR2G
Public Made by Adomby adom
onsemi Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74LCX32DTR2G
onsemi · Gates · TSSOP-14
MC74LCX32DTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Data input A0 of gate 0; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 2 | B0 | input | Data input B0 of gate 0; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 3 | O0 | output | OR gate output O0 with 24 mA balanced sink and source capability at VCC 3.0 V to 3.6 V. |
| 4 | A1 | input | Data input A1 of gate 1; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 5 | B1 | input | Data input B1 of gate 1; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 6 | O1 | output | OR gate output O1 with 24 mA balanced sink and source capability at VCC 3.0 V to 3.6 V. |
| 7 | GND | power_in | Ground reference; the datasheet limits ground current to 100 mA per ground pin. |
| 8 | O3 | output | OR gate output O3 with 24 mA balanced sink and source capability at VCC 3.0 V to 3.6 V. |
| 9 | B3 | input | Data input B3 of gate 3; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 10 | A3 | input | Data input A3 of gate 3; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 11 | O2 | output | OR gate output O2 with 24 mA balanced sink and source capability at VCC 3.0 V to 3.6 V. |
| 12 | B2 | input | Data input B2 of gate 2; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 13 | A2 | input | Data input A2 of gate 2; the datasheet states inputs are 5.0 V tolerant (VI up to 5.5 V) and must not be left floating. |
| 14 | VCC | power_in | Supply pin; the datasheet specifies operation from 2.3 V to 3.6 V with 100 mA maximum supply current per supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
MC74LCX32DTR2G - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mc74lcx32dtr2g-etched.step/mc74lcx32dtr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74lcx32dtr2g.step/mc74lcx32dtr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
ef2d7c71c5e45f94, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).