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SP40P65T2

Public Made by Adom

by adom

Siliup MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

SP40P65T2

Siliup · MOSFETs · SOT-23

SP40P65T2 from Siliup, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V with threshold VGS(th) of -1.0 to -2.5 V at ID=-250µA.
2 S passive Source; continuous drain current of -3 A and body-diode forward voltage up to -1.2 V at IS=-1A.
3 D passive Drain; drain-source voltage rated -40 V with pulsed drain current of -12 A.

Key specifications

Parameter Value
Manufacturer Siliup
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -40 V Ta=25℃ 2
Gate-Source Voltage VGSS -20 20 V Ta=25℃ 2
Continuous Drain Current ID -3 A Ta=25℃ 2
Pulse Drain Current Tested IDM -12 A Ta=25℃ 2
Power Dissipation PD 0.9 W Ta=25℃ 2
Thermal Resistance Junction-to-Ambient RθJA 138.8 °C/W 2
Storage Temperature Range TSTG -55 150 °C 2
Operating Junction Temperature Range TJ -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS -40 V VGS=0V , ID=-250µA 2
Drain-Source Leakage Current IDSS -1 uA VDS=-32V , VGS=0V 2
Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V , VDS=0V 2
Gate Threshold Voltage VGS(th) -1 -1.5 -2.5 V VDS=VGS , ID=-250µA 2
Static Drain-Source On-Resistance RDS(ON) 65 85 mΩ VGS=-10V , ID =-3A 2
Static Drain-Source On-Resistance RDS(ON) 85 110 mΩ VGS=-4.5V , ID =-2A 2
Diode Forward Voltage VSD -1.2 V VGS=0V , IS=-1A , TJ=25℃ 2
Input Capacitance Ciss 520 pF VDS=-15V , VGS=0V , f=1MHz 2
Output Capacitance Coss 52 pF VDS=-15V , VGS=0V , f=1MHz 2
Reverse Transfer Capacitance Crss 41 pF VDS=-15V , VGS=0V , f=1MHz 2
Total Gate Charge Qg 9 nC VDS=-20V , VGS=-10V , ID=-3A 2
Gate-Source Charge Qgs 1 nC VDS=-20V , VGS=-10V , ID=-3A 2
Gate-Drain Charge Qgd 2.5 nC VDS=-20V , VGS=-10V , ID=-3A 2
Turn-On Delay Time td(on) 4.2 nS VDD=-20V VGS=-10V , RG=3.3Ω , ID=-3A 2
Turn-On Rise Time tr 6 nS VDD=-20V VGS=-10V , RG=3.3Ω , ID=-3A 2
Turn-Off Delay Time td(off) 26.8 nS VDD=-20V VGS=-10V , RG=3.3Ω , ID=-3A 2
Turn-Off Fall Time tf 20.6 nS VDD=-20V VGS=-10V , RG=3.3Ω , ID=-3A 2

CAD (KiCad official)

  • Symbol: SP40P65T2
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: sp40p65t2-etched.step / sp40p65t2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sp40p65t2.step / sp40p65t2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (5 pp, sha256 3024e9630d9e2851, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF