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MSP430G2412IPW14R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2412IPW14R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14
MSP430G2412IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Supply voltage for the digital core and I/O, with the 1.8 V to 3.6 V supply range given in the features list. |
| 2 | P1.0/TA0CLK/ACLK/CA0 | bidirectional | General-purpose digital I/O pin, also usable as Timer0_A clock input, ACLK output, or Comparator_A+ CA0 input. |
| 3 | P1.1/TA0.0/CA1 | bidirectional | General-purpose digital I/O pin, also usable as Timer0_A capture CCI0A input or compare Out0 output, or Comparator_A+ CA1 input. |
| 4 | P1.2/TA0.1/CA2 | bidirectional | General-purpose digital I/O pin, also usable as Timer0_A capture CCI1A input or compare Out1 output, or Comparator_A+ CA2 input. |
| 5 | P1.3/CAOUT/CA3 | bidirectional | General-purpose digital I/O pin, also usable as Comparator_A+ output or Comparator_A+ CA3 input. |
| 6 | P1.4/SMCLK/TA0.2/CA4/TCK | bidirectional | General-purpose digital I/O pin, also usable as SMCLK output, Timer0_A capture CCI2A input or compare Out2 output, Comparator_A+ CA4 input, or JTAG test clock input for device programming and test. |
| 7 | P1.5/TA0.0/SCLK/CA5/TMS | bidirectional | General-purpose digital I/O pin, also usable as Timer0_A compare Out0 output, USI clock (input in I2C mode, input or output in SPI mode), Comparator_A+ CA5 input, or JTAG test mode select input. |
| 8 | P1.6/TA0.1/SDO/SCL/CA6/TDI/TCLK | bidirectional | General-purpose digital I/O pin, also usable as Timer0_A compare Out1 output, USI data output in SPI mode or I2C clock in I2C mode, Comparator_A+ CA6 input, or JTAG test data input or test clock during programming and test. |
| 9 | P1.7/CAOUT/SDI/SDA/CA7/TDO/TDI | bidirectional | General-purpose digital I/O pin, also usable as Comparator_A+ output, USI data input in SPI mode or I2C data in I2C mode, Comparator_A+ CA7 input, or JTAG test data output or test data input. |
| 10 | RST/NMI/SBWTDIO | input | Reset input, nonmaskable interrupt input, or Spy-Bi-Wire test data input/output during programming and test. |
| 11 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on port 1 and is connected to the device protection fuse, or serves as Spy-Bi-Wire test clock input during programming and test. |
| 12 | XOUT/P2.7 | bidirectional | Output terminal of the crystal oscillator, or general-purpose digital I/O pin; if used as an input, excess current flows until P2SEL.7 is cleared because of the oscillator output driver connection after reset. |
| 13 | XIN/P2.6/TA0.1 | bidirectional | Input terminal of the crystal oscillator, or general-purpose digital I/O pin, also usable as Timer0_A compare Out1 output. |
| 14 | DVSS | power_in | Ground reference for the digital supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage during program execution | VCC | 1.8 | 3.6 | V | During program execution | 17 | |
| Supply voltage during flash programming/erase | VCC | 2.2 | 3.6 | V | During flash programming/erase | 17 | |
| Operating free-air temperature | TA | -40 | 85 | °C | 17 | ||
| Processor frequency at VCC = 1.8 V | fSYSTEM | 6 | MHz | VCC = 1.8 V, duty cycle 50% ± 10% | 17 | ||
| Processor frequency at VCC = 2.7 V | fSYSTEM | 12 | MHz | VCC = 2.7 V, duty cycle 50% ± 10% | 17 | ||
| Processor frequency at VCC = 3.3 V | fSYSTEM | 16 | MHz | VCC = 3.3 V, duty cycle 50% ± 10% | 17 | ||
| Voltage applied at VCC to VSS | VCC | -0.3 | 4.1 | V | Voltage applied at VCC to VSS | 17 | |
| Voltage applied to any pin | -0.3 | V | Maximum printed as VCC + 0.3 V; referenced to VSS | 17 | |||
| Diode current at any device pin | -2 | 2 | mA | Diode current at any device pin | 17 | ||
| Storage temperature range, unprogrammed device | Tstg | -55 | 150 | °C | Unprogrammed device | 17 | |
| Storage temperature range, programmed device | Tstg | -55 | 150 | °C | Programmed device | 17 | |
| Active mode supply current (1 MHz) | IAM,1MHz | 320 | 400 | µA | VCC = 3 V; fDCO=fMCLK=fSMCLK=1 MHz, program executes in flash, CALBC1_1MHZ/CALDCO_1MHZ | 18 | |
| Low-power mode 0 current (1 MHz) | ILPM0,1MHz | 55 | µA | TA = 25°C, VCC = 2.2 V | 19 | ||
| Low-power mode 2 current | ILPM2 | 22 | µA | TA = 25°C, VCC = 2.2 V | 19 | ||
| Low-power mode 3 current (LFXT1) | ILPM3,LFXT1 | 0.7 | 1 | µA | TA = 25°C, VCC = 2.2 V | 19 | |
| Low-power mode 3 current (VLO) | ILPM3,VLO | 0.5 | 0.7 | µA | TA = 25°C, VCC = 2.2 V | 19 | |
| Low-power mode 4 current at 25°C | ILPM4 | 0.1 | 0.5 | µA | TA = 25°C, VCC = 2.2 V | 19 | |
| Low-power mode 4 current at 85°C | ILPM4 | 0.8 | 1.5 | µA | TA = 85°C, VCC = 2.2 V | 19 | |
| Pullup/pulldown resistor | RPull | 20 | 35 | 50 | kΩ | VCC = 3 V; pullup VIN = VSS, pulldown VIN = VCC | 20 |
| Input capacitance | CI | 5 | pF | VIN = VSS or VCC | 20 | ||
| High-impedance leakage current | Ilkg(Px.x) | -50 | 50 | nA | VCC = 3 V | 20 | |
| 1-MHz tolerance over temperature | -3 | 0.5 | 3 | % | BCSCTL1=CALBC1_1MHZ, DCOCTL=CALDCO_1MHZ, 0°C to 85°C, VCC = 3 V, calibrated at 30°C and 3 V | 26 | |
| 1-MHz tolerance over VCC | -3 | 2 | 3 | % | BCSCTL1=CALBC1_1MHZ, DCOCTL=CALDCO_1MHZ, 30°C, VCC 1.8 V to 3.6 V, calibrated at 30°C and 3 V | 26 | |
| 1-MHz tolerance overall | -6 | 3 | 6 | % | BCSCTL1=CALBC1_1MHZ, DCOCTL=CALDCO_1MHZ, -40°C to 85°C, VCC 1.8 V to 3.6 V, calibrated at 30°C and 3 V | 26 | |
| DCO clock wake-up time from LPM3 or LPM4 | tDCO,LPM3/4 | 1.5 | µs | VCC = 3 V, BCSCTL1 = CALBC1_1MHZ, DCOCTL = CALDCO_1MHZ | 27 | ||
| VLO frequency | fVLO | 4 | 12 | 20 | kHz | -40°C to 85°C, VCC = 3 V | 28 |
| Comparator_A+ offset voltage | V(offset) | -10 | 10 | mV | VCC = 3 V | 30 |
CAD (KiCad official)
- Symbol:
MSP430G2412IPW14R - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
msp430g2412ipw14r-etched.step/msp430g2412ipw14r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2412ipw14r.step/msp430g2412ipw14r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (78 pp, sha256
df44a1269c6d30ea, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).