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Contents

README

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MSP430F413IRTDR

Texas Instruments · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-64-EP(9x9)

MSP430F413IRTDR from Texas Instruments, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage, positive terminal, supplying all parts except those supplied via AVCC.
2 P6.3 bidirectional General-purpose digital I/O.
3 P6.4 bidirectional General-purpose digital I/O.
4 P6.5 bidirectional General-purpose digital I/O.
5 P6.6 bidirectional General-purpose digital I/O.
6 P6.7 bidirectional General-purpose digital I/O (MSP430x412/413 pin; no SVSIN function on this device).
7 NC unconnected Not internally connected; connection to VSS recommended.
8 XIN input Input port for crystal oscillator XT1; standard or watch crystals can be connected.
9 XOUT output Output terminal of crystal oscillator XT1.
10 NC unconnected Not internally connected; connection to VSS recommended.
11 NC unconnected Not internally connected; connection to VSS recommended.
12 P5.1/S0 bidirectional General-purpose digital I/O / LCD segment output 0; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
13 P5.0/S1 bidirectional General-purpose digital I/O / LCD segment output 1; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
14 P4.7/S2 bidirectional General-purpose digital I/O / LCD segment output 2; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
15 P4.6/S3 bidirectional General-purpose digital I/O / LCD segment output 3; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
16 P4.5/S4 bidirectional General-purpose digital I/O / LCD segment output 4; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
17 P4.4/S5 bidirectional General-purpose digital I/O / LCD segment output 5; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
18 P4.3/S6 bidirectional General-purpose digital I/O / LCD segment output 6; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
19 P4.2/S7 bidirectional General-purpose digital I/O / LCD segment output 7; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
20 P4.1/S8 bidirectional General-purpose digital I/O / LCD segment output 8; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
21 P4.0/S9 bidirectional General-purpose digital I/O / LCD segment output 9; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
22 P3.7/S10 bidirectional General-purpose digital I/O / LCD segment output 10; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
23 P3.6/S11 bidirectional General-purpose digital I/O / LCD segment output 11; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
24 P3.5/S12 bidirectional General-purpose digital I/O / LCD segment output 12; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
25 P3.4/S13 bidirectional General-purpose digital I/O / LCD segment output 13; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
26 P3.3/S14 bidirectional General-purpose digital I/O / LCD segment output 14; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
27 P3.2/S15 bidirectional General-purpose digital I/O / LCD segment output 15; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
28 P3.1/S16 bidirectional General-purpose digital I/O / LCD segment output 16; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
29 P3.0/S17 bidirectional General-purpose digital I/O / LCD segment output 17; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
30 P2.7/S18 bidirectional General-purpose digital I/O / LCD segment output 18; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
31 P2.6/CAOUT/S19 bidirectional General-purpose digital I/O / Comparator_A output / LCD segment output 19; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
32 P2.5/S20 bidirectional General-purpose digital I/O / LCD segment output 20; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
33 P2.4/S21 bidirectional General-purpose digital I/O / LCD segment output 21; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
34 P2.3/S22 bidirectional General-purpose digital I/O / LCD segment output 22; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
35 P2.2/S23 bidirectional General-purpose digital I/O / LCD segment output 23; LCD function is selected automatically when the LCD module control bits are set, not with PxSEL bits.
36 COM0 output Common output used for LCD backplane COM0 (COM0-3 are used for LCD backplanes).
37 P5.2/COM1 bidirectional General-purpose digital I/O / common output COM1 for LCD backplanes.
38 P5.3/COM2 bidirectional General-purpose digital I/O / common output COM2 for LCD backplanes.
39 P5.4/COM3 bidirectional General-purpose digital I/O / common output COM3 for LCD backplanes.
40 R03 input Input port of the fourth (lowest) positive analog LCD level (V5).
41 P5.5/R13 bidirectional General-purpose digital I/O / input port of the third most positive analog LCD level (V4 or V3).
42 P5.6/R23 bidirectional General-purpose digital I/O / input port of the second most positive analog LCD level (V2).
43 P5.7/R33 bidirectional General-purpose digital I/O / output port of the most positive analog LCD level (V1).
44 P2.1 bidirectional General-purpose digital I/O.
45 P2.0/TA2 bidirectional General-purpose digital I/O / Timer_A capture CCI2A input, compare Out2 output.
46 P1.7/CA1 bidirectional General-purpose digital I/O / Comparator_A input.
47 P1.6/CA0 bidirectional General-purpose digital I/O / Comparator_A input.
48 P1.5/TACLK/ACLK bidirectional General-purpose digital I/O / input of Timer_A clock or output of ACLK.
49 P1.4 bidirectional General-purpose digital I/O.
50 P1.3/SVSOUT bidirectional General-purpose digital I/O / SVS comparator output.
51 P1.2/TA1 bidirectional General-purpose digital I/O / Timer_A capture CCI1A input, compare Out1 output.
52 P1.1/TA0/MCLK bidirectional General-purpose digital I/O / Timer_A capture CCI0B input or MCLK output; TA0 is only an input on this pin; also BSL receive.
53 P1.0/TA0 bidirectional General-purpose digital I/O / Timer_A capture CCI0A input, compare Out0 output; also BSL transmit.
54 TDO/TDI bidirectional Test data output port; TDO/TDI data output or programming data input terminal.
55 TDI/TCLK input Test data input / test clock input; the device protection fuse is connected to TDI.
56 TMS input Test mode select; used as an input port for device programming and test.
57 TCK input Test clock; the clock input port for device programming and test.
58 RST/NMI input Reset input / nonmaskable interrupt input.
59 P6.0 bidirectional General-purpose digital I/O.
60 P6.1 bidirectional General-purpose digital I/O.
61 P6.2 bidirectional General-purpose digital I/O.
62 AVSS power_in Negative terminal supplying SVS, brownout, oscillator and Comparator_A; must be externally connected to DVSS.
63 DVSS power_in Digital supply voltage, negative terminal; supplies all digital parts except those supplied via AVCC/AVSS.
64 AVCC power_in Positive terminal supplying SVS, brownout, oscillator, Comparator_A, port 1 and LCD resistive divider circuitry; must not power up prior to DVCC.
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-64-EP(9x9)
Category Single Chip Microcomputer/Microcontroller
Pins 65

CAD (KiCad official)

  • Symbol: MSP430F413IRTDR
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: msp430f413irtdr-etched.step / msp430f413irtdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f413irtdr.step / msp430f413irtdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (66 pp, sha256 221c0acc6935c96a, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF