component
74HC126D
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC126D
Nexperia · Buffers, Drivers, Receivers, Transceivers · SOIC-14
74HC126D from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Data enable input for buffer 1, active HIGH; a LOW on nOE puts the output in the high-impedance OFF-state. |
| 2 | 1A | input | Data input for buffer 1; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC. |
| 3 | 1Y | tri_state | Data output for buffer 1, 3-state output that becomes high-impedance when nOE is LOW. |
| 4 | 2OE | input | Data enable input for buffer 2, active HIGH; a LOW on nOE puts the output in the high-impedance OFF-state. |
| 5 | 2A | input | Data input for buffer 2; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC. |
| 6 | 2Y | tri_state | Data output for buffer 2, 3-state output that becomes high-impedance when nOE is LOW. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages. |
| 8 | 3Y | tri_state | Data output for buffer 3, 3-state output that becomes high-impedance when nOE is LOW. |
| 9 | 3A | input | Data input for buffer 3; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC. |
| 10 | 3OE | input | Data enable input for buffer 3, active HIGH; a LOW on nOE puts the output in the high-impedance OFF-state. |
| 11 | 4Y | tri_state | Data output for buffer 4, 3-state output that becomes high-impedance when nOE is LOW. |
| 12 | 4A | input | Data input for buffer 4; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC. |
| 13 | 4OE | input | Data enable input for buffer 4, active HIGH; a LOW on nOE puts the output in the high-impedance OFF-state. |
| 14 | VCC | power_in | Supply voltage; recommended 2.0 V to 6.0 V for 74HC126 and 4.5 V to 5.5 V for 74HCT126, absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5 | 6 | V | 74HC126 | 4 |
| Input voltage | VI | 0 | V | maximum is VCC | 4 | ||
| Output voltage | VO | 0 | V | maximum is VCC | 4 | ||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| Input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC = 2.0 V | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC = 4.5 V | 4 | |
| Input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC = 6.0 V | 4 | ||
| Supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| Input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 | |
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 | |
| Output current | IO | -35 | 35 | mA | -0.5 V < VO < VCC + 0.5 V | 3 | |
| Supply current | ICC | 70 | mA | 3 | |||
| Ground current | IGND | -70 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | VCC = 2.0 V | 4 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | VCC = 4.5 V | 4 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | VCC = 6.0 V | 4 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | VCC = 2.0 V | 4 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | VCC = 4.5 V | 4 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | VCC = 6.0 V | 4 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V | 4 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V | 4 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V | 4 | |
| HIGH-level output voltage | VOH | 3.98 | 4.32 | V | VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V | 4 | |
| HIGH-level output voltage | VOH | 5.48 | 5.81 | V | VI = VIH or VIL; IO = -7.8 mA; VCC = 6.0 V | 4 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V | 4 | |
| LOW-level output voltage | VOL | 0.15 | 0.26 | V | VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V | 4 | |
| LOW-level output voltage | VOL | 0.16 | 0.26 | V | VI = VIH or VIL; IO = 7.8 mA; VCC = 6.0 V | 4 | |
| Input leakage current | II | -0.1 | 0.1 | μA | VI = VCC or GND; VCC = 6.0 V | 4 | |
| OFF-state output current | IOZ | -0.5 | 0.5 | μA | VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND | 4 | |
| Supply current | ICC | 8 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V | 4 | ||
| Propagation delay nA to nY | tpd | 30 | 100 | ns | nA to nY; see Fig. 4; VCC = 2.0 V | 5 | |
| Propagation delay nA to nY | tpd | 11 | 20 | ns | nA to nY; see Fig. 4; VCC = 4.5 V | 5 | |
| Propagation delay nA to nY | tpd | 9 | 17 | ns | nA to nY; see Fig. 4; VCC = 6.0 V | 5 | |
| Enable time nOE to nY | ten | 41 | 125 | ns | nOE to nY; see Fig. 5; VCC = 2.0 V | 5 | |
| Enable time nOE to nY | ten | 15 | 25 | ns | nOE to nY; see Fig. 5; VCC = 4.5 V | 5 | |
| Enable time nOE to nY | ten | 12 | 21 | ns | nOE to nY; see Fig. 5; VCC = 6.0 V | 5 | |
| Disable time nOE to nY | tdis | 41 | 125 | ns | nOE to nY; see Fig. 5; VCC = 2.0 V | 5 | |
| Disable time nOE to nY | tdis | 15 | 25 | ns | nOE to nY; see Fig. 5; VCC = 4.5 V | 5 | |
| Disable time nOE to nY | tdis | 12 | 21 | ns | nOE to nY; see Fig. 5; VCC = 6.0 V | 5 | |
| Transition time | tt | 14 | 60 | ns | see Fig. 4; VCC = 2.0 V | 6 | |
| Transition time | tt | 5 | 12 | ns | see Fig. 4; VCC = 4.5 V | 6 | |
| Transition time | tt | 4 | 10 | ns | see Fig. 4; VCC = 6.0 V | 6 | |
| Input capacitance | CI | 3.5 | pF | 5 |
CAD (KiCad official)
- Symbol:
74HC126D - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
74hc126d-etched.step/74hc126d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc126d.step/74hc126d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (13 pp, sha256
9ba79df1ac62551b, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).