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MD57E33WB6
Public Made by Adomby adom
Shanghai Mingda Microelectronics Linear Voltage Regulators (LDO), DFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMD57E33WB6
Shanghai Mingda Microelectronics · Linear Voltage Regulators (LDO) · DFN-4-EP(1x1)
MD57E33WB6 from Shanghai Mingda Microelectronics, in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin, operating range 2.2 V to 5.5 V (absolute maximum 6.0 V), with a 1 µF or larger input capacitor. |
| 2 | EN | input | Enable input, active high with VENH min 0.85 V and VENL max 0.35 V, internally pulled to GND by 1 MΩ, and low level activates the 240 Ω output auto-discharge. |
| 3 | GND | power_in | Ground pin. |
| 4 | VOUT | power_out | Regulated output (3.3 V for MD57E33WB6) delivering up to 300 mA, requires at least a 1 µF output capacitor which may be placed up to 10 cm away. |
| 5 | EP | passive | Exposed thermal pad of the DFN1*1-4L package; the datasheet shows it but states no connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Mingda Microelectronics |
| Package | DFN-4-EP(1x1) |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Dropout Voltage | VDROP | 120 | mV | VEN=VIN, VOUT>=3V IOUT=300mA | 4 | ||
| Line Regulation | ΔVOUT/ΔVIN | 0.02 | 0.1 | %/V | VOUT(S)+1.0V<=VIN=VEN<=5.5V IOUT=10mA | 4 | |
| Line Transient | VOUT_Line | -1 | mV | VIN=VOUT+1V to VOUT+2V in 30us | 4 | ||
| Line Transient | VOUT_Line | 1 | mV | VIN=VOUT+2V to VOUT+1V in 30us | 4 | ||
| Load Regulation | VOUT2 | 10 | 20 | mV | VIN=VEN=VOUT(S)+1.0V 1mA<=IOUT<=300mA | 4 | |
| Load Transient | VOUT_Load | -40 | mV | IOUT=1mA to 300mA in 10us | 4 | ||
| Load Transient | VOUT_Load | 40 | mV | IOUT=300mA to 1mA in 10us | 4 | ||
| Temperature Stability | ΔVOUT/(VOUT·ΔT) | -100 | 100 | ppm/℃ | VIN=VEN=VOUT(S)+1.0V IOUT=1mA, -40℃<=Ta<=125℃ | 4 | |
| GND Current | IGND | 20 | 30 | µA | VEN=VIN no load | 4 | |
| GND Current | IGND | 470 | µA | IOUT=300mA | 4 | ||
| Shutdown Current | ISHUT | 0.01 | 0.1 | µA | VIN=5.5V, VEN=0 | 4 | |
| Input Voltage | VIN | 2.2 | 5.5 | V | 4 | ||
| Maximum Output Current | IOUTMAX | 250 | 300 | mA | 4 | ||
| Current Limit | ILIM | 500 | mA | VIN=VEN=VOUT(S)+1.0V VOUT = 0.95 ×VOUT(S) | 4 | ||
| COUT Auto Discharge | RDCHG | 240 | Ω | VEN=0, VOUT=VOUT(S) | 4 | ||
| Power Supply Rejection Ratio | PSRR | 94 | dB | f=1kHz, IOUT=20mA | 4 | ||
| Power Supply Rejection Ratio | PSRR | 72 | dB | f=10kHz, IOUT=20mA | 4 | ||
| Power Supply Rejection Ratio | PSRR | 77 | dB | f=100kHz, IOUT=20mA | 4 | ||
| Power Supply Rejection Ratio | PSRR | 53 | dB | f=1MHz, IOUT=20mA | 4 | ||
| Output Noise Voltage | eN | 20 | µVRMS | IOUT=20mA | 4 | ||
| Start-Up Time | TSTART | 80 | 150 | µs | From VEN>VENH to VOUT=95% of VOUT | 4 | |
| Overshoot on Start-Up | VOUT_Start-up | 5 | % | Stated as a percentage of VOUT(S) | 4 | ||
| EN 'H' Level Voltage | VENH | 0.85 | 5.5 | V | 4 | ||
| EN 'L' Level Voltage | VENL | 0 | 0.35 | V | 4 | ||
| EN 'H' Level Current | IENH | -0.1 | 0.1 | µA | VIN=5.5V, VEN=VIN | 4 | |
| EN 'L' Level Current | IENL | -0.1 | 0.1 | µA | VIN=5.5V, VEN=0 | 4 | |
| Over Temperature Protection | OTP | 155 | ℃ | IOUT=1mA | 4 | ||
| Output Voltage | VOUT(S) | 0.98 | 1.02 | x VOUT(S) | VIN=VOUT(S)+1.0V IOUT=1mA, VOUT(S)>=2.0V | 4 | |
| Input Voltage | VIN | -0.3 | 6 | V | 3 | ||
| Output Voltage | VOUT | -0.3 | V | Maximum is VIN+0.3V | 3 | ||
| Power Dissipation DFN1*1-4L | PD | 200 | mW | 3 | |||
| Thermal Resistance DFN1*1-4L | RθJB | 160 | ℃/W | Mounted on JEDEC standard 4 layer (2s2p) PCB test board | 3 | ||
| Operating Ambient Temperature | Topr | -40 | 85 | ℃ | 3 | ||
| Storage Temperature | Tstg | -40 | 125 | ℃ | 3 | ||
| ESD Protection HBM | ESD HBM | 6000 | V | 3 | |||
| Operating Junction Temperature | TJ | -40 | 125 | ℃ | 1 | ||
| Output Capacitor Range | COUT | 1 | 10 | µF | Output capacitor range | 10 | |
| Input/Output Capacitor ESR Range | ESR | 5 | 500 | mΩ | Input/Output capacitor ESR range | 10 |
CAD (KiCad official)
- Symbol:
MD57E33WB6 - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
md57e33wb6-etched.step/md57e33wb6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);md57e33wb6.step/md57e33wb6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Mingda Microelectronics datasheet (12 pp, sha256
42680ba6ee0683b4, retrieved 2026-11-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).