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Contents

README

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XD74LS279

XINLUDA · Latches · DIP-16

XD74LS279 from XINLUDA, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1R input Active-low reset input of latch 1; pulsing it low resets Q low.
2 1S1 input Active-low set input 1 of latch 1 (ANDed with 1S2); pulsing low sets Q high.
3 1S2 input Active-low set input 2 of latch 1 (ANDed with 1S1); pulsing low sets Q high.
4 1Q output Latch 1 output, set high by S low and reset low by R low.
5 2R input Active-low reset input of latch 2; pulsing it low resets Q low.
6 2S input Active-low set input of latch 2; pulsing it low sets Q high.
7 2Q output Latch 2 output, set high by S low and reset low by R low.
8 GND power_in Ground, the network ground reference for voltage values.
9 3Q output Latch 3 output, set high by S low and reset low by R low.
10 3R input Active-low reset input of latch 3; pulsing it low resets Q low.
11 3S1 input Active-low set input 1 of latch 3 (ANDed with 3S2); pulsing low sets Q high.
12 3S2 input Active-low set input 2 of latch 3 (ANDed with 3S1); pulsing low sets Q high.
13 4Q output Latch 4 output, set high by S low and reset low by R low.
14 4R input Active-low reset input of latch 4; pulsing it low resets Q low.
15 4S input Active-low set input of latch 4; pulsing it low sets Q high.
16 VCC power_in Supply voltage, recommended 4.75 V to 5.25 V (5 V nominal), 7 V absolute maximum.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
High-level output current IOH -0.4 mA 4
Low-level output current IOL 8 mA 4
Operating free-air temperature TA 0 70 °C 4
Supply voltage VCC 7 V With respect to network ground terminal (see Note 1) 3
Input voltage (74LS279) VI 7 V 3
Operating free-air temperature range, DIP package 0 70 °C DIP package 3
Storage temperature range Tstg -65 150 °C 3
Input clamp voltage VIK -1.5 V VCC = MIN, II = −18 mA 4
High-level output voltage VOH 2.7 3.4 V VCC = MIN, VIL = MAX, IOH = −0.4 mA 4
Low-level output voltage VOL 0.25 0.4 V VCC = MIN, VIH = 2 V, IOL = 4 mA 4
Low-level output voltage VOL 0.25 0.5 V VCC = MIN, VIH = 2 V, IOL = 8 mA 4
Input current at maximum input voltage II 0.1 mA VCC = MAX, VI = 7 V 4
High-level input current IIH 20 µA VCC = MAX, VI = 2.7 V 4
Low-level input current IIL -0.2 mA VCC = MAX, VI = 0.4 V 4
Short-circuit output current IOS -20 -100 mA VCC = MAX 4
Supply current ICC 3.8 7 mA VCC = MAX, See note2 4
Propagation delay low-to-high, S to Q tPLH 12 22 ns VCC = 5 V, TA = 25°C, RL = 2 kΩ, CL = 15 pF 4
Propagation delay high-to-low, S to Q tPHL 13 21 ns VCC = 5 V, TA = 25°C, RL = 2 kΩ, CL = 15 pF 4
Propagation delay high-to-low, R to Q tPHL 15 27 ns VCC = 5 V, TA = 25°C, RL = 2 kΩ, CL = 15 pF 4

CAD (KiCad official)

  • Symbol: XD74LS279
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: xd74ls279-etched.step / xd74ls279-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd74ls279.step / xd74ls279.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (6 pp, sha256 0413ed2cc8c01fc3, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF