DG612EEQ-T1-GE4 from Vishay, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN1	input	Logic control input for switch 1 (SW1). CMOS/TTL compatible; VIL guaranteed ≤0.8 V, VIH guaranteed ≥2 V (from +5 V or ±5 V supplies; 1.4 V from +3 V supply). Logic 1 = SW1 ON (normally open switch).
2	D1	passive	Drain terminal of analog switch 1. Bidirectional analog I/O; VD signal range clamped to V- − 0.3 V to V+ + 0.3 V. RDS(on) ≈ 72 Ω typ. at ±5 V supplies.
3	S1	passive	Source terminal of analog switch 1. Bidirectional analog I/O; rail-to-rail signal handling within V- to V+ supplies. Continuous current 30 mA max.
4	V-	power_in	Negative analog supply. GND − 18 V max; V+ to V- ≤ 18 V. Tie to 0 V for single-supply operation or to a negative rail (typ. −5 V) for dual-supply operation.
5	GND	power_in	Digital/logic ground reference for the control inputs. Referenced separately from V-; GND to V- ≤ 18 V.
6	S4	passive	Source terminal of analog switch 4. Bidirectional analog I/O; rail-to-rail signal handling within V- to V+ supplies.
7	D4	passive	Drain terminal of analog switch 4. Bidirectional analog I/O.
8	IN4	input	Logic control input for switch 4 (SW4). Logic 1 = SW4 ON (normally open). Input current ≤ 0.1 µA typ.
9	IN3	input	Logic control input for switch 3 (SW3). Logic 1 = SW3 ON (normally open).
10	D3	passive	Drain terminal of analog switch 3. Bidirectional analog I/O.
11	S3	passive	Source terminal of analog switch 3. Bidirectional analog I/O.
12	NC	unconnected	No internal connection. Leave open or tie to a convenient potential; carries no signal.
13	V+	power_in	Positive analog supply. 3 V to 16 V single-supply range, or +3 V to +8 V for dual-supply operation. V+ to V- ≤ 18 V absolute max.
14	S2	passive	Source terminal of analog switch 2. Bidirectional analog I/O.
15	D2	passive	Drain terminal of analog switch 2. Bidirectional analog I/O.
16	IN2	input	Logic control input for switch 2 (SW2). Logic 1 = SW2 ON (normally open).

Key specifications

Parameter	Value
Manufacturer	Vishay
Package	TSSOP-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

DG612EEQ-T1-GE4
DG612EEY-T1-GE4
DG612EEN-T1-GE4

CAD (KiCad official)

Symbol: DG612EEQ-T1-GE4
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`dg612eeq-t1-ge4.step`	205 KB	You want the bare part, or you mark your own boards.
`dg612eeq-t1-ge4-etched.step`	2.7 MB	You want the part with `DG612EEQ-T1-GE4` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 698 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Vishay datasheet (18 pp, sha256 cc2a0be0291f8016, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF