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CAT24C08YI-GT3A-TUDI
Public Made by Adomby adom
Tudi EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCAT24C08YI-GT3A-TUDI
Tudi · EEPROM · TSSOP-8
CAT24C08YI-GT3A-TUDI from Tudi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input that must be hard-wired; on the 8K (AT24C08) device A0 is a no-connect and is not used for device addressing. |
| 2 | A1 | input | Device address input that must be hard-wired; on the 8K (AT24C08) device A1 is a no-connect and is not used for device addressing. |
| 3 | A2 | input | Device address input that must be hard-wired to match the A2 device address bit; it is the only address input used on the 8K device. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Bidirectional serial data pin that is open-drain driven and may be wire-ORed with other open-drain or open-collector devices, with data changing only while SCL is low. |
| 6 | SCL | input | Serial clock input where data is positive-edge clocked into the EEPROM and negative-edge clocked out of it. |
| 7 | WP | input | Write Protect pin: connecting it to GND allows normal read/write operations, while connecting it to VCC enables write protection of the full array. |
| 8 | VCC | power_in | Power supply, specified from 1.7 V to 5.5 V for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | TSSOP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | -0.3 | 6.5 | V | 10 | |||
| Input / Output Voltage (GND-0.3V to VCC+0.3V) | -0.3 | V | 10 | ||||
| Operating Ambient Temperature | -40 | 85 | ℃ | 10 | |||
| Storage Temperature | -65 | 150 | ℃ | 10 | |||
| Electrostatic pulse (Human Body model) | 8000 | V | Human Body model | 10 | |||
| Output Low Level VCC=5.0V | VOL2 | 0.4 | V | VCC=5.0V, IOL=3.0mA | 10 | ||
| Output Low Level VCC=1.7V | VOL1 | 0.2 | V | VCC=1.7V, IOL=0.15mA | 10 | ||
| Input High Level | VIH1 | 0.7 | 0.3 | V | VCC=1.7V to 5.5V | 10 | |
| Input Low Level | VIL1 | -0.3 | 0.3 | V | VCC=1.7V to 5.5V | 10 | |
| Output Leakage Current | ILO | 0.05 | 1 | µA | VOUT=VCC or VSS | 10 | |
| Input Leakage Current | ILI | 0.1 | 1 | µA | VIN=VCC or VSS | 10 | |
| Supply Current (standby) | ISB1 | 0.03 | 0.5 | µA | VCC=5.0V | 10 | |
| Supply Current WRITE at 400KHZ | ICC2 | 0.28 | 0.5 | mA | VCC=5.0V, WRITE at 400KHZ | 10 | |
| Supply Current READ at 400KHZ | ICC1 | 0.14 | 0.3 | mA | VCC=5.0V, READ at 400KHZ | 10 | |
| Supply Voltage (CC2 range) | VCC2 | 2.5 | 5.5 | V | 10 | ||
| Supply Voltage (CC1 range) | VCC1 | 1.7 | 5.5 | V | 10 | ||
| Input Capacitance (A0, A1, A2, SCL) | CIN | 6 | pF | TA=25℃, f=1.0 MHz, VCC=+1.7V, VIN=0V | 10 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | TA=25℃, f=1.0 MHz, VCC=+1.7V, VI/O=0V | 10 | ||
| Clock Frequency, SCL | fSCL | 400 | KHZ | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Clock Frequency, SCL | fSCL | 1000 | KHZ | 2.5V≤VCC<5.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Write Cycle Time | tWR | 1.9 | 3 | ms | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | |
| Data Out Hold Time | tDH | 50 | ns | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Stop Setup Time | tSU.STO | 0.25 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Input Fall Time | tF | 0.3 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Input Rise Time | tR | 0.3 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Data in Setup Time | tSU.DAT | 100 | ns | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Data In Hold Time | tHD.DAT | 0 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Start Setup Time | SU:DAT | 0.25 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Start Hold Time | tHD.STA | 0.25 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Time the bus must be free before a new transmission can start | tBUF | 0.5 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Clock Low to Data Out Valid | tAA | 0.1 | 0.55 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | |
| Noise Suppression Time | tI | 50 | ns | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Clock Pulse Width High | tHIGH | 0.4 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 | ||
| Clock Pulse Width Low | tLOW | 0.6 | µs | 1.7V≤VCC<2.5V, CL=1 TTL Gate and 100 pF | 11 |
CAD (KiCad official)
- Symbol:
CAT24C08YI-GT3A-TUDI - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
cat24c08yi-gt3a-tudi-etched.step/cat24c08yi-gt3a-tudi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cat24c08yi-gt3a-tudi.step/cat24c08yi-gt3a-tudi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (18 pp, sha256
a5479fb1f6e61f13, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).