AT89C51ED2-RLTUM from Microchip Tech, in a QFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	P1.5/CEX2/MISO	bidirectional	Port 1 bit 5 with internal pull-up, also PCA module 2 capture/compare I/O (CEX2) and SPI MISO.
2	P1.6/CEX3/SCK	bidirectional	Port 1 bit 6 with internal pull-up, also PCA module 3 capture/compare I/O (CEX3) and SPI serial clock (SCK).
3	P1.7/CEX4/MOSI	bidirectional	Port 1 bit 7 with internal pull-up, also PCA module 4 capture/compare I/O (CEX4) and SPI MOSI.
4	RST	input	Reset: a high for two machine cycles while the oscillator is running resets the device; has an internal diffused resistor to VSS and is an output when the hardware watchdog forces a reset.
5	P3.0/RxD	bidirectional	Port 3 bit 0 with internal pull-up, also serial input port (RXD).
6	NIC	unconnected	Not internally connected.
7	P3.1/TxD	bidirectional	Port 3 bit 1 with internal pull-up, also serial output port (TXD).
8	P3.2/INT0	bidirectional	Port 3 bit 2 with internal pull-up, also external interrupt 0 input.
9	P3.3/INT1	bidirectional	Port 3 bit 3 with internal pull-up, also external interrupt 1 input.
10	P3.4/T0	bidirectional	Port 3 bit 4 with internal pull-up, also Timer 0 external input.
11	P3.5/T1	bidirectional	Port 3 bit 5 with internal pull-up, also Timer 1 external input.
12	P3.6/WR	bidirectional	Port 3 bit 6 with internal pull-up, also external data memory write strobe (WR).
13	P3.7/RD	bidirectional	Port 3 bit 7 with internal pull-up, also external data memory read strobe (RD).
14	XTAL2	output	Output from the inverting oscillator amplifier.
15	XTAL1	input	Input to the inverting oscillator amplifier and to the internal clock generator circuits.
16	VSS	power_in	Ground: 0V reference.
17	NIC	unconnected	Not internally connected.
18	P2.0/A8	bidirectional	Port 2 bit 0 with internal pull-up, also high-order address bit A8 for external memory.
19	P2.1/A9	bidirectional	Port 2 bit 1 with internal pull-up, also high-order address bit A9 for external memory.
20	P2.2/A10	bidirectional	Port 2 bit 2 with internal pull-up, also high-order address bit A10 for external memory.
21	P2.3/A11	bidirectional	Port 2 bit 3 with internal pull-up, also high-order address bit A11 for external memory.
22	P2.4/A12	bidirectional	Port 2 bit 4 with internal pull-up, also high-order address bit A12 for external memory.
23	P2.5/A13	bidirectional	Port 2 bit 5 with internal pull-up, also high-order address bit A13 for external memory.
24	P2.6/A14	bidirectional	Port 2 bit 6 with internal pull-up, also high-order address bit A14 for external memory.
25	P2.7/A15	bidirectional	Port 2 bit 7 with internal pull-up, also high-order address bit A15 for external memory.
26	PSEN	output	Program Strobe Enable: read strobe to external program memory, activated twice each machine cycle during external code execution and not activated for internal fetches.
27	ALE/PROG	output	Address Latch Enable output at 1/6 (1/3 in X2 mode) of the oscillator frequency, and program pulse input (PROG) during Flash programming; can be disabled with AUXR.0.
28	NIC	unconnected	Not internally connected.
29	EA	input	External Access Enable: must be held low to fetch code from external program memory 0000H to FFFFH; latched on reset if security level 1 is programmed.
30	P0.7/AD7	bidirectional	Port 0 bit 7, open-drain bidirectional I/O and multiplexed address/data bit AD7 for external memory.
31	P0.6/AD6	bidirectional	Port 0 bit 6, open-drain bidirectional I/O and multiplexed address/data bit AD6 for external memory.
32	P0.5/AD5	bidirectional	Port 0 bit 5, open-drain bidirectional I/O and multiplexed address/data bit AD5 for external memory.
33	P0.4/AD4	bidirectional	Port 0 bit 4, open-drain bidirectional I/O and multiplexed address/data bit AD4 for external memory.
34	P0.3/AD3	bidirectional	Port 0 bit 3, open-drain bidirectional I/O and multiplexed address/data bit AD3 for external memory.
35	P0.2/AD2	bidirectional	Port 0 bit 2, open-drain bidirectional I/O and multiplexed address/data bit AD2 for external memory.
36	P0.1/AD1	bidirectional	Port 0 bit 1, open-drain bidirectional I/O and multiplexed address/data bit AD1 for external memory.
37	P0.0/AD0	bidirectional	Port 0 bit 0, open-drain bidirectional I/O and multiplexed address/data bit AD0 for external memory.
38	VCC	power_in	Power supply voltage for normal, idle and power-down operation (2.7V to 5.5V).
39	NIC	unconnected	Not internally connected.
40	P1.0/T2	bidirectional	Port 1 bit 0 with internal pull-up, also Timer/Counter 2 external count input/clock-out (T2).
41	P1.1/T2EX/SS	bidirectional	Port 1 bit 1 with internal pull-up, also Timer 2 reload/capture/direction control (T2EX) and SPI slave select (SS).
42	P1.2/ECI	bidirectional	Port 1 bit 2 with internal pull-up, also external clock input for the PCA (ECI).
43	P1.3/CEX0	bidirectional	Port 1 bit 3 with internal pull-up, also PCA module 0 capture/compare external I/O (CEX0).
44	P1.4/CEX1	bidirectional	Port 1 bit 4 with internal pull-up, also PCA module 1 capture/compare external I/O (CEX1).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	QFP-44(10x10)
Category	Embedded Processors & Controllers
Pins	44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Operating temperature (industrial)	TA	-40		85	°C	I = industrial	114
Supply voltage range	VCC	2.7		5.5	V	F = 0 to 40 MHz (internal and external code execution)	114
Supply voltage range, 60 MHz internal code	VCC	4.5		5.5	V	F = 0 to 60 MHz (internal code execution only)	114
Storage temperature	Tstg	-65		150	°C		114
Voltage on VCC to VSS	VCC	-0.5		6.5	V		114
Voltage on any pin to VSS		-0.5		5.5	V	-0.5V to VCC + 0.5V (printed as VCC + 0.5)	114
Power dissipation				1	W		114
Input Low Voltage	VIL	-0.5		0.2	V	max printed 0.2 VCC - 0.1	114
Input High Voltage except RST, XTAL1	VIH	0.2			V	min printed 0.2 VCC + 0.9; max VCC + 0.5	114
Input High Voltage RST, XTAL1	VIH1	0.7			V	min printed 0.7 VCC; max VCC + 0.5	114
Output Low Voltage ports 1,2,3,4	VOL			0.45	V	VCC = 2.7V to 5.5V, IOL = 0.8 mA	114
Output Low Voltage port 0, ALE, PSEN	VOL1			0.45	V	VCC = 2.7V to 5.5V, IOL = 1.6 mA	114
Output High Voltage ports 1,2,3,4	VOH	0.9			V	VCC = 2.7V to 5.5V, IOH = -10 µA; min printed 0.9 VCC	114
Output High Voltage port 0, ALE, PSEN	VOH1	0.9			V	VCC = 2.7V to 5.5V, IOH = -10 µA; min printed 0.9 VCC	115
RST Pull-down Resistor	RRST	50	200	250	kΩ		115
Logical 0 Input Current ports 1-5	IIL			-50	µA	VIN = 0.45V	115
Input Leakage Current	ILI	-10		10	µA	0.45V < VIN < VCC	115
Logical 1 to 0 Transition Current ports 1-4	ITL			-650	µA	VIN = 2.0V	115
Capacitance of I/O Buffer	CIO			10	pF	FC = 3 MHz, TA = 25°C	115
Power-down Current	IPD		75	150	µA	2.7 < VCC < 5.5V	115
Flash or EEdata programming time	tWRITE		7	17	ms	2.7 < VCC < 5.5V	115
Internal POR/PFD VPFDP threshold	VPFDP	2.25	2.5	2.69	V		115
Internal POR/PFD VPFDM threshold	VPFDM	2.15	2.35	2.62	V		115
Internal POR/PFD Hysteresis	Vhyst	70	140	250	mV		115
Maximum Vcc power supply slew rate	dV/dt			0.1	V/µs		115
Oscillator clock period	T	25			ns	-M	118
ALE pulse width	TLHLL	35			ns	-M	118
RD pulse width	TRLRH	125			ns	-M	120
WR pulse width	TWLWH	125			ns	-M	120

CAD (KiCad official)

Symbol: AT89C51ED2-RLTUM
Footprint: Package_QFP:LQFP-44_10x10mm_P0.8mm
3D model: QFP-44(10x10) (KiCad packages3D, STEP)
3D model files: at89c51ed2-rltum-etched.step / at89c51ed2-rltum-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at89c51ed2-rltum.step / at89c51ed2-rltum.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (137 pp, sha256 eca60c463d595aea, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AT89C51ED2-RLTUM

Changed since verified AT89C51ED2-RLTUM

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README