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Contents

README

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LR8103B-T15

LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L

LR8103B-T15 from LR, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply; operating input up to 6.5V (absolute maximum 9V), needs a ceramic bypass capacitor of at least 1µF close to the pin.
2 GND power_in Ground reference for input, output and enable; use a large ground copper area for noise immunity and heat dissipation.
3 CE input Chip enable input that switches the regulator ON/OFF, with enable voltage specified 0.7V to 1.2V; shutdown current is within ±1µA when CE=0V.
4 NC unconnected No internal connection.
5 VOUT power_out Regulated 1.5V output (±1%) for the -T15 version, up to 300mA with short-circuit current limited to 30mA, needs an output capacitor of at least 1µF.

Key specifications

Parameter Value
Manufacturer LR
Package SOT-23-5L
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Enable voltage (high threshold) VCE 0.7 1.2 V VIN=2.2V, IOUT=1mA 4
Line regulation ΔVOUT -30 30 mV VOUT+1V≤VIN≤6.5V, VIN=VCE, IOUT=10mA 4
Load regulation ΔVOUT -40 40 mV VIN=VCE=VOUT+1V, 1mA≤IOUT≤100mA 4
Shutdown current ISHD -1 1 uA VIN=VOUT+1V, VCE=0V 4
Quiescent current ISS 0.8 1 uA VIN=VCE=VOUT+1V 4
Temperature coefficient of VOUT ΔVOUT/(ΔTa*VOUT) -100 50 100 ppm/℃ VIN=VCE=VOUT+1V, IOUT=10mA, -40℃≤Ta≤85℃ 5
Input voltage (electrical table) VIN 6.5 V ISS=1uA 4
Maximum input supply voltage (absolute) VIN 9 V 4
Maximum output current (absolute) IOUT 450 mA 4
Power dissipation SOT23-5L PD 250 mW 4
ESD human body model HBM -2000 2000 V POS/NEG 4
Operating temperature TOPR -10 85 ℃ 4
Storage temperature TSTG -40 125 ℃ 4
Input capacitor (recommended) CIN 1 uF ceramic, input pin, battery-powered high-impedance source 6
Output capacitor (recommended) COUT 1 uF ceramic 6
Thermal resistance junction-to-ambient SOT23-5L θJA 500 °C/W 6
Maximum junction temperature (absolute) TJ(MAX) 150 °C 6
Recommended maximum junction temperature TJ 125 °C 6
Minimum dropout voltage at 50 mA VDROP 150 mV VIN=VCE, IOUT=50mA, ΔVOUT=±2%*VOUT 5
Minimum dropout voltage at 100 mA VDROP 320 mV VIN=VCE, IOUT=100mA, ΔVOUT=±2%*VOUT 5
Ripple rejection at 100 Hz PSRR 75 dB VIN=VCE=VOUT+1V, IOUT=10mA, f=100Hz 5
Ripple rejection at 1 kHz PSRR 55 dB VIN=VCE=VOUT+1V, IOUT=10mA, f=1kHz 5
Ripple rejection at 10 kHz PSRR 40 dB VIN=VCE=VOUT+1V, IOUT=10mA, f=10kHz 5
Short-circuit current ISCP 30 mA VOUT=GND 5
Output current IOUT 300 mA VIN=VCE=VOUT+1V 4

CAD (KiCad official)

  • Symbol: LR8103B-T15
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5L (KiCad packages3D, STEP)
  • 3D model files: lr8103b-t15-etched.step / lr8103b-t15-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr8103b-t15.step / lr8103b-t15.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LR datasheet (10 pp, sha256 10593f286bcf1c34, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF