DMG9933USD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin	Name	Type	Function
1	S1	passive	Source of P-channel MOSFET 1 (Q1); the device is rated for VDSS of -20V and VGSS of ±12V.
2	G1	input	Gate of P-channel MOSFET 1 (Q1); gate threshold VGS(th) is -0.45V to -1.1V at ID = -250µA and maximum VGS is ±12V.
3	S2	passive	Source of P-channel MOSFET 2 (Q2); the device is rated for VDSS of -20V and VGSS of ±12V.
4	G2	input	Gate of P-channel MOSFET 2 (Q2); gate threshold VGS(th) is -0.45V to -1.1V at ID = -250µA and maximum VGS is ±12V.
5	D2	passive	Drain of P-channel MOSFET 2 (Q2), connected to pin 6; continuous drain current is -4.6A at TA = +25°C and pulsed IDM is -20A.
6	D2	passive	Drain of P-channel MOSFET 2 (Q2), connected to pin 5; continuous drain current is -4.6A at TA = +25°C and pulsed IDM is -20A.
7	D1	passive	Drain of P-channel MOSFET 1 (Q1), connected to pin 8; continuous drain current is -4.6A at TA = +25°C and pulsed IDM is -20A.
8	D1	passive	Drain of P-channel MOSFET 1 (Q1), connected to pin 7; continuous drain current is -4.6A at TA = +25°C and pulsed IDM is -20A.

Key specifications

Parameter	Value
Manufacturer	Diodes Incorporated
Package	SO-8
Category	Transistors
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDSS			-20	V		2
Gate-Source Voltage	VGSS	-12		12	V		2
Continuous Drain Current	ID			-4.6	A	VGS = -4.5V, Steady State, TA = +25°C	2
Continuous Drain Current	ID			-3	A	VGS = -4.5V, Steady State, TA = +85°C	2
Pulsed Drain Current	IDM			-20	A		2
Power Dissipation	PD			1.15	W	Device mounted on FR-4 PCB, minimum recommended pad layout	2
Operating and Storage Temperature Range	TJ, TSTG	-55		150	°C		2
Thermal Resistance, Junction to Ambient	RθJA		109		°C/W	TA = +25°C	2
Drain-Source Breakdown Voltage	BVDSS	-20			V	VGS = 0V, ID = -250μA	2
Zero Gate Voltage Drain Current	IDSS			-1	μA	TJ = +25°C, VDS = -16V, VGS = 0V	2
Gate-Source Leakage	IGSS	-100		100	nA	VGS = ±12V, VDS = 0V	2
Gate Threshold Voltage	VGS(th)	-0.45		-1.1	V	VDS = VGS, ID = -250μA	2
Static Drain-Source On-Resistance	RDS(ON)		55	75	mΩ	VGS = -4.5V, ID = -4.8A	2
Static Drain-Source On-Resistance	RDS(ON)		76	110	mΩ	VGS = -2.5V, ID = -1A	2
Diode Forward Voltage	VSD		-0.8	-1.2	V	VGS = 0V, IS = -2A	2
Forward Transfer Admittance	/Yfs/		10		S	VDS = -9V, ID = -3.4A	2
Input Capacitance	Ciss		608.4		pF	VDS = -6V, VGS = 0V, f = 1MHz	2
Output Capacitance	Coss		81.5		pF	VDS = -6V, VGS = 0V, f = 1MHz	2
Reverse Transfer Capacitance	Crss		72.4		pF	VDS = -6V, VGS = 0V, f = 1MHz	2
Gate Resistance	Rg		44.91		Ω	VDS = 0V, VGS = 0V, f = 1MHz	2
Total Gate Charge	Qg		6.5		nC	VDS = -10V, VGS = -4.5V, ID = -3.2A	2
Gate-Source Charge	Qgs		0.9		nC	VDS = -10V, VGS = -4.5V, ID = -3.2A	2
Gate-Drain Charge	Qgd		1.5		nC	VDS = -10V, VGS = -4.5V, ID = -3.2A	2
Turn-On Delay Time	tD(on)		12.45		ns	VDS = -10V, VGS = -4.5V, RL = 10Ω, RG = 1Ω, ID = -1A	2
Turn-On Rise Time	tr		10.29		ns	VDS = -10V, VGS = -4.5V, RL = 10Ω, RG = 1Ω, ID = -1A	2
Turn-Off Delay Time	tD(off)		46.52		ns	VDS = -10V, VGS = -4.5V, RL = 10Ω, RG = 1Ω, ID = -1A	2
Turn-Off Fall Time	tf		22.19		ns	VDS = -10V, VGS = -4.5V, RL = 10Ω, RG = 1Ω, ID = -1A	2
Thermal Resistance, Junction to Ambient (transient thermal figure)	RθJA		156		°C/W	Fig. 12 Transient Thermal Resistance	5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	Copper	tin	 Terminal Connections: See Diagram Below  Terminals: Finish  Matte Tin Annealed over Copper	1

CAD (land: KiCad; 3D: generated from the datasheet)

Symbol: DMG9933USD-13
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8, generated on the KiCad land (body 3.85 x 4.9 mm, terminals on the pads, 1.45 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
3D model files: dmg9933usd-13-etched.step / dmg9933usd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmg9933usd-13.step / dmg9933usd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes Incorporated datasheet (7 pp, sha256 549f78d8afb81f26, retrieved 2026-11-13, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF

DMG9933USD-13

Verified DMG9933USD-13

Verification log 1 record

3D Model

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Schematic Symbol

PCB Footprint

Datasheet

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