SN74ALS32N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Data input A of gate 1 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
2	1B	input	Data input B of gate 1 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
3	1Y	output	Output of gate 1, equal to 1A OR 1B (Y = A + B in positive logic).
4	2A	input	Data input A of gate 2 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
5	2B	input	Data input B of gate 2 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
6	2Y	output	Output of gate 2, equal to 2A OR 2B (Y = A + B in positive logic).
7	GND	power_in	Ground reference pin for the device.
8	3Y	output	Output of gate 3, equal to 3A OR 3B (Y = A + B in positive logic).
9	3A	input	Data input A of gate 3 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
10	3B	input	Data input B of gate 3 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
11	4Y	output	Output of gate 4, equal to 4A OR 4B (Y = A + B in positive logic).
12	4A	input	Data input A of gate 4 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
13	4B	input	Data input B of gate 4 in the quadruple 2-input positive-OR gate, where Y = A + B in positive logic; absolute maximum input voltage is 7 V.
14	VCC	power_in	Supply voltage pin; recommended range is 4.5 V to 5.5 V (nominal 5 V), with an absolute maximum of 7 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-14
Category	Logic ICs
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage	VCC	4.5	5	5.5	V		2
High-level input voltage	VIH	2			V		2
Low-level input voltage	VIL			0.8	V		2
High-level output current	IOH			-0.4	mA		2
Low-level output current	IOL			8	mA		2
Operating free-air temperature	TA	0		70	°C		2
Supply voltage	VCC			7	V		2
Input voltage	VI			7	V		2
Operating free-air temperature range, SN74ALS32	TA	0		70	°C		2
Storage temperature range		-65		150	°C		2
Input clamp voltage	VIK			-1.5	V	VCC = 4.5 V, II = -18 mA	2
Low-level output voltage	VOL		0.25	0.4	V	VCC = 4.5 V, IOL = 4 mA	2
Low-level output voltage	VOL		0.35	0.5	V	VCC = 4.5 V, IOL = 8 mA	2
Input current at maximum input voltage	II			0.1	mA	VCC = 5.5 V, VI = 7 V	2
High-level input current	IIH			20	µA	VCC = 5.5 V, VI = 2.7 V	2
Low-level input current	IIL			-0.1	mA	VCC = 5.5 V, VI = 0.4 V	2
Output current	IO	-30		-112	mA	VCC = 5.5 V, VO = 2.25 V	2
Supply current, outputs high	ICCH		1.9	4	mA	VCC = 5.5 V, VI = 4.5 V	2
Supply current, outputs low	ICCL		2.6	4.9	mA	VCC = 5.5 V, VI = 0	2
Propagation delay low-to-high (A or B to Y)	tPLH	3		14	ns	VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX	2
Propagation delay high-to-low (A or B to Y)	tPHL	3		12	ns	VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX	2

CAD (KiCad official)

Symbol: SN74ALS32N
Footprint: Package_DIP:DIP-14_W7.62mm
3D model: PDIP-14 (KiCad packages3D, STEP)
3D model files: sn74als32n-etched.step / sn74als32n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74als32n.step / sn74als32n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (19 pp, sha256 946e0a87430883ed, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

SN74ALS32N

Verified SN74ALS32N

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

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Datasheet

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