component
uc2843bd1013tr
Public Unreviewedby Ray
STMicroelectronics DC-DC Converters, SO-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownUC2843BD1013TR
STMicroelectronics · DC-DC Converters · SO-8
UC2843BD1013TR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output, made available for external loop compensation. Sinks up to 12 mA typical and sources -1 mA typical; output voltage swings between ~1.1 V (low) and ~6.2 V (high) with a 15 kΩ load. Used with feedback network (Zf/Zi) to shape control-loop response. |
| 2 | VFB | input | Inverting input of the error amplifier. Normally connected to the switching supply output through a resistor divider so that in regulation VFB = 2.5 V (internal reference at the non-inverting input). Input bias current -0.1 µA typical (-2 µA max). |
| 3 | ISENSE | input | Current-sense input. A voltage proportional to inductor/switch current (typically from a sense resistor Rs) is applied here; the PWM comparator terminates the output pulse when this voltage reaches ~1 V, giving Ipk ≈ 1 V / Rs. Absolute maximum -0.3 V to 5.5 V; input bias -2 µA typical, propagation delay to output 150 ns typical. |
| 4 | RT/CT | passive | Oscillator programming pin. A timing resistor RT to VREF (pin 8) and a timing capacitor CT to ground set the oscillator frequency and maximum output duty cycle. Operation up to 500 kHz is possible; oscillator peak-to-peak swing ~1.6 V, discharge current ~8.3 mA typical. |
| 5 | GROUND | power_in | Combined control-circuitry and power ground. All voltages in the datasheet are referenced to this pin. Timing and bypass capacitors should be connected to this pin using a single-point ground layout because of the high peak currents driven by the output stage. |
| 6 | OUTPUT | output | High-current totem-pole gate-driver output; directly drives the gate of an N-channel power MOSFET. Sources and sinks peak currents up to ±1 A. VOL 0.1 V typ @ 20 mA, VOH ~13.5 V typ @ 20 mA; typical rise/fall times 50 ns into 1 nF. Output is held low during UVLO. |
| 7 | VCC | power_in | Positive supply of the control IC (labeled Vi in the block diagram). Absolute maximum 30 V from a low-impedance source (self-limiting via internal 36 V zener above ~30 V). UC2843B/UC3843B start threshold 8.4 V typ, min operating voltage after turn-on 7.6 V typ. Start-up current <0.5 mA, operating current ~12 mA typ (17 mA max). |
| 8 | VREF | power_out | Trimmed 5.00 V reference output (±1% initial for UC2843B at 25 °C, ±3.6% over line, load, temperature). Sources up to 50 mA; short-circuit current typ -100 mA. Provides charging current for the oscillator timing capacitor CT through timing resistor RT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
UC2843BD1013TRUC2843BD1013TRUC3843BD1UC2843BD1013TRUC2843BNUC2843BD1013TRUC3843BN
CAD (KiCad official)
- Symbol:
UC2843BD1013TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (None pp, sha256
fedfd7362400f8b3, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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