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THS7368IPW

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by Ray

Texas Instruments Video Amplifiers, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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THS7368IPW

Texas Instruments · Video Amplifiers · TSSOP-20

THS7368IPW from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SD1 IN input Standard-definition video input, channel 1 (CVBS). LPF = 9.5 MHz. Internal 800 kΩ input bias, sync-tip clamp for DC restore.
2 SD2 IN input Standard-definition video input, channel 2 (S-Video Y). LPF = 9.5 MHz.
3 SD3 IN input Standard-definition video input, channel 3 (S-Video C). LPF = 9.5 MHz.
4 Filter 2 input Filter select input, used with Filter 1 to select LPF cutoff on SF channels (9.5/18/36/72 MHz). Logic input; defaults to logic 0 when left floating. VIH ≥ 1.6 V, VIL ≤ 0.75 V at 3.3 V supply.
5 VS+ power_in Positive power-supply pin, 2.7 V to 5.5 V (recommended 2.7 V to 5 V). Total quiescent current 23.4 mA typical at 3.3 V.
6 Filter 1 input Filter select input, used with Filter 2 to select LPF cutoff on SF channels (9.5/18/36/72 MHz). Logic input; defaults to logic 0 when left floating.
7 SF1 IN input Selectable-filter channel 1 input (component/RGB Y' or G'). LPF selectable 9.5/18/36/72 MHz or bypass.
8 SF2 IN input Selectable-filter channel 2 input (component/RGB P'B or B'). LPF selectable 9.5/18/36/72 MHz or bypass.
9 SF3 IN input Selectable-filter channel 3 input (component/RGB P'R or R'). LPF selectable 9.5/18/36/72 MHz or bypass.
10 Bypass SD input Bypass control for the three SD channel filters. Logic high bypasses the internal filters; logic low engages them. Defaults to logic 0 when floating.
11 Bypass SF input Bypass control for the three SF (selectable filter) channels. Logic high bypasses the internal filters; logic low engages them. Defaults to logic 0 when floating.
12 SF3 OUT output Selectable-filter channel 3 output (component/RGB P'R or R'). Rail-to-rail output with 6 dB gain; drives 150 Ω or 75 Ω video loads.
13 SF2 OUT output Selectable-filter channel 2 output (component/RGB P'B or B'). Rail-to-rail output with 6 dB gain.
14 SF1 OUT output Selectable-filter channel 1 output (component/RGB Y' or G'). Rail-to-rail output with 6 dB gain.
15 Disable SF input Disable control for the three SF channels. Logic high disables (powers down) the SF channels; logic low enables them. Defaults to logic 0 when floating.
16 GND power_in Ground pin for all internal circuitry.
17 Disable SD input Disable control for the three SD channels. Logic high disables (powers down) the SD channels; logic low enables them. Defaults to logic 0 when floating.
18 SD3 OUT output Standard-definition video output, channel 3 (S-Video C). LPF = 9.5 MHz. Rail-to-rail output with 6 dB gain.
19 SD2 OUT output Standard-definition video output, channel 2 (S-Video Y). LPF = 9.5 MHz. Rail-to-rail output with 6 dB gain.
20 SD1 OUT output Standard-definition video output, channel 1 (CVBS). LPF = 9.5 MHz. Rail-to-rail output with 6 dB gain.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Amplifiers/Comparators
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • THS7368IPW
  • THS7368IPWR

CAD (KiCad official)

  • Symbol: THS7368IPW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 8cbd958a363d4498, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF