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STM32C031K6T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32C031K6T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32C031K6T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | 5V-tolerant fast I/O, usable as IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2 or I2C1_SDA (Fm+/wakeup-from-Stop capable) alternate function, or EVENTOUT. |
| 2 | PC14-OSCX_IN | bidirectional | 5V-tolerant I/O, default GPIO PC14 at reset, that can instead drive the 32.768 kHz low-speed external oscillator input (OSCX_IN) or act as USART1_TX, TIM1_ETR/TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA or EVENTOUT. |
| 3 | PC15-OSCX_OUT | bidirectional | 5V-tolerant I/O, default GPIO PC15 at reset, that can instead drive the 32.768 kHz low-speed external oscillator output (OSCX_OUT) or act as OSC32_EN, OSC_EN, TIM1_ETR or TIM3_CH3. |
| 4 | VDD/VDDA | power_in | Main digital and analog power supply input for the device core, I/Os (VDDIO1) and ADC (VDDA), specified from 2.0 V (1.96 V minimum after POR) to 3.6 V. |
| 5 | VSS/VSSA | power_in | Common digital and analog ground reference for the device. |
| 6 | PF2-NRST | bidirectional | 5V-tolerant bidirectional pin combining GPIO PF2 with the active-low system reset function (NRST), featuring a ~40 kΩ internal weak pull-up and a Schmitt trigger with 200 mV hysteresis; also usable as MCO or TIM1_CH4 alternate function. |
| 7 | PA0 | bidirectional | 5V-tolerant I/O usable as ADC_IN0 analog input, WKUP1 wakeup source, or USART2_CTS, TIM16_CH1, USART1_TX, TIM1_CH1 alternate function. |
| 8 | PA1 | bidirectional | 5V-tolerant I/O usable as ADC_IN1 analog input or SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA, EVENTOUT alternate function. |
| 9 | PA2 | bidirectional | 5V-tolerant I/O usable as ADC_IN2 analog input, WKUP4 wakeup source, LSCO clock output, or SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3 alternate function. |
| 10 | PA3 | bidirectional | 5V-tolerant I/O usable as ADC_IN3 analog input or USART2_RX, TIM1_CH1N, TIM1_CH4, EVENTOUT alternate function. |
| 11 | PA4 | bidirectional | 5V-tolerant I/O usable as ADC_IN4 analog input, RTC_TS timestamp input, RTC_OUT1, WKUP2 wakeup source, or SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N, EVENTOUT alternate function. |
| 12 | PA5 | bidirectional | 5V-tolerant I/O usable as ADC_IN5 analog input or SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1, EVENTOUT alternate function. |
| 13 | PA6 | bidirectional | 5V-tolerant I/O usable as ADC_IN6 analog input or SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1 alternate function. |
| 14 | PA7 | bidirectional | 5V-tolerant I/O usable as ADC_IN7 analog input or SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 alternate function. |
| 15 | PB0 | bidirectional | 5V-tolerant I/O usable as ADC_IN17 analog input or SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N alternate function. |
| 16 | PB1 | bidirectional | 5V-tolerant I/O usable as ADC_IN18 analog input or TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N, EVENTOUT alternate function. |
| 17 | PB2 | bidirectional | 5V-tolerant I/O usable as ADC_IN19 analog input or USART1_RX, MCO2, EVENTOUT alternate function. |
| 18 | PA8 | bidirectional | 5V-tolerant I/O usable as ADC_IN8 analog input or MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX, MCO2 alternate function. |
| 19 | PA9 | bidirectional | 5V-tolerant I/O (can be remapped in place of PA11 via SYSCFG_CFGR1, per note 1) usable as MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL, EVENTOUT alternate function. |
| 20 | PC6 | bidirectional | 5V-tolerant I/O usable as TIM3_CH1 alternate function. |
| 21 | PA10 | bidirectional | 5V-tolerant I/O (can be remapped in place of PA12 via SYSCFG_CFGR1, per note 1) usable as USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT alternate function. |
| 22 | PA11 | bidirectional | 5V-tolerant I/O, default mapping location for PA9's alternate functions can be swapped in via SYSCFG_CFGR1 (note 1); usable as ADC_IN11 analog input or SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2 alternate function. |
| 23 | PA12 | bidirectional | 5V-tolerant I/O, default mapping location for PA10's alternate functions can be swapped in via SYSCFG_CFGR1 (note 1); usable as ADC_IN12 analog input or SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN alternate function. |
| 24 | PA13 | bidirectional | 5V-tolerant I/O configured by default as the SWDIO serial-wire debug data pin with its internal pull-up activated at reset; also usable as ADC_IN13 analog input or IR_OUT, TIM3_ETR, USART2_RX, EVENTOUT alternate function. |
| 25 | PA14-BOOT0 | bidirectional | 5V-tolerant I/O configured by default as the SWCLK serial-wire debug clock pin with its internal pull-down activated at reset, and also serving as the BOOT0 boot-mode selector; usable as ADC_IN14 analog input or SPI1_NSS/I2S1_WS, USART2_TX/RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK alternate function. |
| 26 | PA15 | bidirectional | 5V-tolerant I/O usable as SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK, EVENTOUT alternate function. |
| 27 | PB3 | bidirectional | 5V-tolerant I/O usable as SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS_DE_CK, EVENTOUT alternate function. |
| 28 | PB4 | bidirectional | 5V-tolerant I/O usable as SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT alternate function. |
| 29 | PB5 | bidirectional | 5V-tolerant I/O usable as WKUP6 wakeup source or SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3, I2C1_SMBA alternate function. |
| 30 | PB6 | bidirectional | 5V-tolerant I/O usable as WKUP3 wakeup source or USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, USART1_RTS_DE_CK, USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI1_MISO/I2S1_MCK, SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH1, TIM3_CH2, TIM16_BKIN, TIM17_BKIN alternate function. |
| 31 | PB7 | bidirectional | 5V-tolerant I/O usable as RTC_REFIN reference clock input or USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, I2C1_SDA, EVENTOUT, USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL alternate function. |
| 32 | PB8 | bidirectional | 5V-tolerant I/O usable as USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL, EVENTOUT alternate function. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM32C031K6T6 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32c031k6t6-etched.step/stm32c031k6t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32c031k6t6.step/stm32c031k6t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (108 pp, sha256
c0de50247b672919, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).