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TPS71701DCKT
Public Made by Adomby adom
Texas Instruments Linear Voltage Regulators (LDO), SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTPS71701DCKT
Texas Instruments · Linear Voltage Regulators (LDO) · SC-70-5
TPS71701DCKT from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply to the device (2.5 V to 6.5 V operating range); a 0.1-µF to 1-µF capacitor is recommended for better performance. |
| 2 | GND | power_in | Ground. |
| 3 | EN | input | Driving EN above VEN(high) turns on the regulator, while driving it below VEN(low) puts the regulator into standby mode, disabling the output and reducing operating current; do not float this pin. |
| 4 | FB | input | Adjustable-voltage version feedback input fed to the error amplifier; a resistor divider from OUT to FB sets the regulated output voltage. |
| 5 | OUT | power_out | Regulated output voltage; a minimum capacitance of 1 µF from this pin to ground is required for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Power Supply Chip |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 2.5 | 6.5 | V | 5 | ||
| Internal reference (TPS71701) | VFB | 0.79 | 0.8 | 0.81 | V | 5 | |
| Output voltage range (TPS71701) | VOUT | 0.9 | V | max is 6.5, VDO | 5 | ||
| Output accuracy (VOUT < 1.0 V) | VOUT | -30 | 30 | mV | Over VIN, IOUT, temp; VOUT + 0.5 V ≤ VIN ≤ 6.5 V, 0 mA ≤ IOUT ≤ 150 mA | 5 | |
| Output accuracy (VOUT ≥ 1.0 V) | VOUT | -3 | 3 | % | Over VIN, IOUT, temp; VOUT + 0.5 V ≤ VIN ≤ 6.5 V, 0 mA ≤ IOUT ≤ 150 mA | 5 | |
| Output current limit (TPS71701) | ILIM (adjustable) | 200 | 325 | 575 | mA | VOUT = 0.9 × VOUT(nom) | 5 |
| Ground pin current | IGND | 45 | 80 | μA | IOUT = 0.1 mA | 5 | |
| Ground pin current | IGND | 100 | μA | IOUT = 150 mA | 5 | ||
| Shutdown current | ISHDN | 0.2 | 1.5 | μA | VEN ≤ 0.4 V, 2.5 V ≤ VIN < 4.5 V | 5 | |
| Shutdown current | ISHDN | 0.9 | μA | VEN ≤ 0.4 V, 4.5 V ≤ VIN ≤ 6.5 V, TJ = -40°C to 85°C | 5 | ||
| Feedback pin current (TPS71701) | IFB | 0.02 | 1 | μA | 5 | ||
| Enable high (enabled) | VEN(high) | 1.2 | 6.5 | V | VIN ≤ 5.5 V | 5 | |
| Enable high (enabled) | VEN(high) | 1.25 | 6.5 | V | 5.5 V < VIN ≤ 6.5 V | 5 | |
| Enable low (shutdown) | VEN(low) | 0 | 0.4 | V | 5 | ||
| Enable pin current, enabled | IEN(high) | 0.02 | 1 | μA | EN = 6.5 V | 5 | |
| Undervoltage lockout | UVLO | 2.41 | 2.45 | 2.49 | V | VIN rising | 5 |
| Dropout voltage | VDO | 170 | 300 | mV | IOUT = 150 mA (VIN = VOUT(nom), 0.1 V) | 5 | |
| Operating junction temperature | TJ | -40 | 125 | °C | 5 | ||
| Input voltage (abs max) | VIN | -0.3 | 7 | V | 4 | ||
| FB voltage (abs max) | VFB | -0.3 | 3.6 | V | 4 | ||
| NR voltage (abs max) | VNR | -0.3 | 3.6 | V | 4 | ||
| Enable voltage (abs max) | VEN | -0.3 | 7 | V | VIN + 0.3 V or 7 V, whichever is greater | 4 | |
| Output voltage (abs max) | VOUT | -0.3 | 7 | V | 4 | ||
| Operating junction temperature (abs max) | TJ | -55 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, all pins | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged device model, all pins | 4 | |
| Input voltage (recommended) | VIN | 2.5 | 6.5 | V | 4 | ||
| Output voltage (recommended) | VOUT | 0.9 | 5 | V | 4 | ||
| Output current | IOUT | 0 | 150 | mA | 4 | ||
| Enable voltage (recommended) | VEN | 0 | V | max is VIN | 4 | ||
| Output capacitor | COUT | 1 | 100 | µF | 4 | ||
| Junction temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 279.2 | °C/W | DCK, 5 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 57.5 | °C/W | DCK, 5 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 74.1 | °C/W | DCK, 5 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 0.8 | °C/W | DCK, 5 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 73.1 | °C/W | DCK, 5 pins | 4 | ||
| Output accuracy nominal | VOUT | 2.5 | mV | Nominal TJ = 25°C; printed ±2.5 | 5 | ||
| Line regulation | ΔVOUT(ΔVIN) | 125 | µV/V | VOUT(nom) + 0.5 V ≤ VIN ≤ 6.5 V, IOUT = 5 mA | 5 | ||
| Load regulation | ΔVOUT(ΔIOUT) | 70 | µV/mA | 0 mA ≤ IOUT ≤ 150 mA | 5 | ||
| UVLO hysteresis | UVLO | 150 | mV | VIN falling | 5 | ||
| Thermal shutdown temperature | Tsd | 160 | °C | Shutdown, temperature increasing | 5 | ||
| Thermal shutdown reset temperature | Tsd | 140 | °C | Reset, temperature decreasing | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor, and to the LDO ground pin as close to the GND pin as possible, connected by wide, component-side, copper surface area. The use of vias and long traces to create LDO component connections is | 19 |
CAD (KiCad official)
- Symbol:
TPS71701DCKT - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
tps71701dckt-etched.step/tps71701dckt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps71701dckt.step/tps71701dckt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
0e5cc0bc2b6ade11, retrieved 2026-10-23, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).